Add W6300 ethernet initialization
This commit is contained in:
Ian Gulliver
+20
-2
@@ -11,13 +11,31 @@ pico_sdk_init()
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add_executable(picomap
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picomap.cpp
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lib/w6300/wizchip_spi.c
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lib/w6300/wizchip_qspi_pio.c
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lib/w6300/ioLibrary/wizchip_conf.c
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lib/w6300/ioLibrary/W6300/w6300.c
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lib/w6300/ioLibrary/socket.c
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)
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target_include_directories(picomap PRIVATE include)
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target_include_directories(picomap PRIVATE
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include
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lib/w6300
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lib/w6300/ioLibrary
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lib/w6300/ioLibrary/W6300
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)
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target_compile_definitions(picomap PRIVATE
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_WIZCHIP_=W6300
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DEVICE_BOARD_NAME=W6300_EVB_PICO2
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_WIZCHIP_QSPI_MODE_=QSPI_QUAD_MODE
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)
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pico_generate_pio_header(picomap ${CMAKE_CURRENT_LIST_DIR}/lib/w6300/wizchip_qspi_pio.pio)
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pico_enable_stdio_usb(picomap 1)
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pico_enable_stdio_uart(picomap 0)
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pico_add_extra_outputs(picomap)
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target_link_libraries(picomap pico_stdlib)
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target_link_libraries(picomap pico_stdlib hardware_pio hardware_spi hardware_dma hardware_clocks)
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@@ -0,0 +1,11 @@
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/* Board list */
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#define WIZnet_Ethernet_HAT 0
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#define W5100S_EVB_PICO 1
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#define W5500_EVB_PICO 2
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#define W55RP20_EVB_PICO 3
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#define W5100S_EVB_PICO2 4
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#define W5500_EVB_PICO2 5
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#define W6100_EVB_PICO 6
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#define W6100_EVB_PICO2 7
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#define W6300_EVB_PICO 8
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#define W6300_EVB_PICO2 9
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@@ -0,0 +1,273 @@
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//*****************************************************************************
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//
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//! \file W6300.c
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//! \brief W6300 HAL Implements file.
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//! \version 1.0.0
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//! \date 2019/01/01
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//! \par Revision history
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//! <2019/01/01> 1st Release
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//! \author MidnightCow
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//! \copyright
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//!
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//! Copyright (c) 2019, WIZnet Co., LTD.
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//!
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//! Permission is hereby granted, free of charge, to any person obtaining a copy
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//! of this software and associated documentation files (the "Software"), to deal
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//! in the Software without restriction, including without limitation the rights
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//! to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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//! copies of the Software, and to permit persons to whom the Software is
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//! furnished to do so, subject to the following conditions:
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//!
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//! The above copyright notice and this permission notice shall be included in
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//! all copies or substantial portions of the Software.
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//!
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//! THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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//! IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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//! FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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//! AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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//! LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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//! OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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//! SOFTWARE.
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//!
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//*****************************************************************************
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#include "w6300.h"
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#if 0
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#define _WIZCHIP_SPI_VDM_OP_ 0x00
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#define _WIZCHIP_SPI_FDM_LEN1_ 0x01
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#define _WIZCHIP_SPI_FDM_LEN2_ 0x02
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#define _WIZCHIP_SPI_FDM_LEN4_ 0x03
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#endif
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//
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// If you want to use SPI FDM mode, Feel free contact to WIZnet.
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// http://forum.wiznet.io
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//
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#if _WIZCHIP_ == 6300
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////////////////////////////////////////////////////////////////////////////////////////
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#define _W6300_SPI_OP_ _WIZCHIP_SPI_VDM_OP_
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#define _W6300_SPI_READ_ (0x00 << 5) ///< SPI interface Read operation in Control Phase
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#define _W6300_SPI_WRITE_ (0x01 << 5) ///< SPI interface Write operation in Control Phase
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//////////////////////////////////////////////////
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void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb) {
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uint8_t opcode = 0;
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uint16_t ADDR = 0;
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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#if (_WIZCHIP_IO_MODE_ & 0xff00) & _WIZCHIP_IO_MODE_BUS_
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uint8_t tAD[4];
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tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
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tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
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tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
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tAD[3] = wb;
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WIZCHIP.IF.BUS._write_data_buf(IDM_AR0, tAD, 4, 1);
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#else //w6300 QSPI MODE
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opcode = (uint8_t)((AddrSel & 0x000000FF) | (_W6300_SPI_WRITE_) | (_WIZCHIP_QSPI_MODE_));
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ADDR = (uint16_t)((AddrSel & 0x00ffff00) >> 8);
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WIZCHIP.IF.QSPI._write_qspi(opcode, ADDR, &wb, 1);
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#endif
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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}
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uint8_t WIZCHIP_READ(uint32_t AddrSel) {
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//uint8_t ret;
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uint8_t ret[2] = {0,};
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uint8_t opcode = 0;
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uint16_t ADDR = 0;
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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#if (_WIZCHIP_IO_MODE_ & 0xff00) & _WIZCHIP_IO_MODE_BUS_
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uint8_t tAD[3];
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tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
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tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
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tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
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WIZCHIP.IF.BUS._write_data_buf(IDM_AR0, tAD, 3, 1);
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ret[0] = WIZCHIP.IF.BUS._read_data(IDM_DR);
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#else
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opcode = (uint8_t)((AddrSel & 0x000000FF) | (_W6300_SPI_READ_) | (_WIZCHIP_QSPI_MODE_));
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ADDR = (uint16_t)((AddrSel & 0x00ffff00) >> 8);
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WIZCHIP.IF.QSPI._read_qspi(opcode, ADDR, ret, 1);
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#endif
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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return ret[0];
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}
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void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, datasize_t len) {
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uint8_t opcode = 0;
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uint16_t ADDR = 0;
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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#if (_WIZCHIP_IO_MODE_ & 0xff00) & _WIZCHIP_IO_MODE_BUS_
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uint8_t tAD[3];
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tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
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tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
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tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
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WIZCHIP.IF.BUS._write_data_buf(IDM_AR0, tAD, 3, 1);
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WIZCHIP.IF.BUS._write_data_buf(IDM_DR, pBuf, len, 0);
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#else
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opcode = (uint8_t)((AddrSel & 0x000000FF) | (_W6300_SPI_WRITE_) | (_WIZCHIP_QSPI_MODE_));
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ADDR = (uint16_t)((AddrSel & 0x00ffff00) >> 8);
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WIZCHIP.IF.QSPI._write_qspi(opcode, ADDR, pBuf, len);//by_lihan
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//qspi_write_buf(opcode, ADDR, pBuf, len);
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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#endif
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}
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void WIZCHIP_READ_BUF(uint32_t AddrSel, uint8_t* pBuf, datasize_t len) {
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uint8_t ret;
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uint8_t opcode = 0;
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uint16_t ADDR = 0;
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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#if _WIZCHIP_IO_MODE_ & _WIZCHIP_IO_MODE_BUS_
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uint8_t tAD[3];
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tAD[0] = (uint8_t)((AddrSel & 0x00FF0000) >> 16);
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tAD[1] = (uint8_t)((AddrSel & 0x0000FF00) >> 8);
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tAD[2] = (uint8_t)(AddrSel & 0x000000ff);
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WIZCHIP.IF.BUS._write_data_buf(IDM_AR0, tAD, 3, 1);
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WIZCHIP.IF.BUS._read_data_buf(IDM_DR, pBuf, len, 0);
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#else
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opcode = (uint8_t)((AddrSel & 0x000000FF) | (_W6300_SPI_READ_) | (_WIZCHIP_QSPI_MODE_));
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ADDR = (uint16_t)((AddrSel & 0x00ffff00) >> 8);
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WIZCHIP.IF.QSPI._read_qspi(opcode, ADDR, pBuf, len);//by_lihan
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//qspi_read_buf(opcode, ADDR, pBuf, len);
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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#endif
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}
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uint16_t getSn_TX_FSR(uint8_t sn) {
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uint16_t prev_val = -1, val = 0;
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do {
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prev_val = val;
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val = WIZCHIP_READ(_Sn_TX_FSR_(sn));
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val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_TX_FSR_(sn), 1));
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} while (val != prev_val);
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return val;
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}
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uint16_t getSn_RX_RSR(uint8_t sn) {
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uint16_t prev_val = -1, val = 0;
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do {
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prev_val = val;
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val = WIZCHIP_READ(_Sn_RX_RSR_(sn));
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val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_RX_RSR_(sn), 1));
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} while (val != prev_val);
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return val;
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}
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void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len) {
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uint16_t ptr = 0;
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uint32_t addrsel = 0;
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ptr = getSn_TX_WR(sn);
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addrsel = ((uint32_t)ptr << 8) + WIZCHIP_TXBUF_BLOCK(sn);
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WIZCHIP_WRITE_BUF(addrsel, wizdata, len);
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ptr += len;
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setSn_TX_WR(sn, ptr);
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}
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#if 0
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#define ETHERNET_BUF_MAX_SIZE_TEMP (1024 * 32 )
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void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len) {
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uint16_t ptr = 0;
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uint32_t addrsel = 0;
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if (len == 0) {
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return;
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}
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ptr = getSn_RX_RD(sn);
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if (ptr + len > 0xFFFF) {
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addrsel = ((uint32_t)ptr << 8) + WIZCHIP_RXBUF_BLOCK(sn);
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uint16_t size = 0xFFFF - ptr;
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WIZCHIP_READ_BUF(addrsel, wizdata, size);
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wizdata += size;
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size = len - size;
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addrsel = WIZCHIP_RXBUF_BLOCK(sn);
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WIZCHIP_READ_BUF(addrsel, wizdata, size);
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} else {
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addrsel = ((uint32_t)ptr << 8) + WIZCHIP_RXBUF_BLOCK(sn);
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WIZCHIP_READ_BUF(addrsel, wizdata, len);
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}
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ptr += len;
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ptr %= 0xFFFF ;
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setSn_RX_RD(sn, ptr);
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}
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#else
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void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len) {
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uint16_t ptr = 0;
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uint32_t addrsel = 0;
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if (len == 0) {
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return;
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}
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ptr = getSn_RX_RD(sn);
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addrsel = ((uint32_t)ptr << 8) + WIZCHIP_RXBUF_BLOCK(sn);
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WIZCHIP_READ_BUF(addrsel, wizdata, len);
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ptr += len;
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setSn_RX_RD(sn, ptr);
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}
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#endif
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void wiz_recv_ignore(uint8_t sn, uint16_t len) {
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setSn_RX_RD(sn, getSn_RX_RD(sn) + len);
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}
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#if 1
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// 20231019 taylor
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void wiz_delay_ms(uint32_t milliseconds) {
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uint32_t i;
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for (i = 0 ; i < milliseconds ; i++) {
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//Write any values to clear the TCNTCLKR register
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setTCNTRCLR(0xff);
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// Wait until counter register value reaches 10.(10 = 1ms : TCNTR is 100us tick counter register)
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while (getTCNTR() < 0x0a) {}
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}
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}
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#endif
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/// @cond DOXY_APPLY_CODE
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#if (_PHY_IO_MODE_ == _PHY_IO_MODE_MII_)
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/// @endcond
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void wiz_mdio_write(uint8_t phyregaddr, uint16_t var) {
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setPHYRAR(phyregaddr);
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setPHYDIR(var);
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setPHYACR(PHYACR_WRITE);
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while (getPHYACR()); //wait for command complete
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}
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uint16_t wiz_mdio_read(uint8_t phyregaddr) {
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setPHYRAR(phyregaddr);
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setPHYACR(PHYACR_READ);
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while (getPHYACR()); //wait for command complete
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return getPHYDOR();
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}
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/// @cond DOXY_APPLY_CODE
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#endif
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/// @endcond
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////////////////////////////////////////////////////////////////////////////////////////
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#endif
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,736 @@
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//*****************************************************************************
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//
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//! \file socket.h
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//! \brief SOCKET APIs Header file.
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//! \details SOCKET APIs like as berkeley socket api.
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//! \version 1.0.2
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//! \date 2013/10/21
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//! \par Revision history
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//! <2015/02/05> Notice
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//! The version history is not updated after this point.
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//! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary.
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//! >> https://github.com/Wiznet/ioLibrary_Driver
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//! <2014/05/01> V1.0.2. Refer to M20140501
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//! 1. Modify the comment : SO_REMAINED -> PACK_REMAINED
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//! 2. Add the comment as zero byte udp data reception in getsockopt().
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//! <2013/10/21> 1st Release
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//! \author MidnightCow
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//! \copyright
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//!
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//! Copyright (c) 2013, WIZnet Co., LTD.
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//! All rights reserved.
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//!
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//! Redistribution and use in source and binary forms, with or without
|
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//! modification, are permitted provided that the following conditions
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//! are met:
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//!
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//! * Redistributions of source code must retain the above copyright
|
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//! notice, this list of conditions and the following disclaimer.
|
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//! * Redistributions in binary form must reproduce the above copyright
|
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//! notice, this list of conditions and the following disclaimer in the
|
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//! documentation and/or other materials provided with the distribution.
|
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//! * Neither the name of the <ORGANIZATION> nor the names of its
|
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//! contributors may be used to endorse or promote products derived
|
||||
//! from this software without specific prior written permission.
|
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//!
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//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
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//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
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//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
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//! THE POSSIBILITY OF SUCH DAMAGE.
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//
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//*****************************************************************************
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/**
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@defgroup WIZnet_socket_APIs 1. WIZnet socket APIs
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@brief WIZnet socket APIs are based on Berkeley socket APIs, thus it has much similar name and interface.
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But there is a little bit of difference.
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@details
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<b> Comparison between WIZnet and Berkeley SOCKET APIs </b>
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<table>
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<tr> <td><b>API</b></td> <td><b>WIZnet</b></td> <td><b>Berkeley</b></td> </tr>
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<tr> <td>socket()</td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>bind()</b></td> <td>X</td> <td>O</td> </tr>
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<tr> <td><b>listen()</b></td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>connect()</b></td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>accept()</b></td> <td>X</td> <td>O</td> </tr>
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<tr> <td><b>recv()</b></td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>send()</b></td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>recvfrom()</b></td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>sendto()</b></td> <td>O</td> <td>O</td> </tr>
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<tr> <td><b>closesocket()</b></td> <td>O<br>close() & disconnect()</td> <td>O</td> </tr>
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</table>
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There are @b bind() and @b accept() functions in @b Berkeley SOCKET API but,
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not in @b WIZnet SOCKET API. Because socket() of WIZnet is not only creating a SOCKET but also binding a local port number,
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and listen() of WIZnet is not only listening to connection request from client but also accepting the connection request. \n
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When you program "TCP SERVER" with Berkeley SOCKET API, you can use only one listen port.
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When the listen SOCKET accepts a connection request from a client, it keeps listening.
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After accepting the connection request, a new SOCKET is created and the new SOCKET is used in communication with the client. \n
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Following figure shows network flow diagram by Berkeley SOCKET API.
|
||||
@image html Berkeley_SOCKET.jpg "<Berkeley SOCKET API>"
|
||||
But, When you program "TCP SERVER" with WIZnet SOCKET API, you can use as many as 8 listen SOCKET with same port number. \n
|
||||
Because there's no accept() in WIZnet SOCKET APIs, when the listen SOCKET accepts a connection request from a client,
|
||||
it is changed in order to communicate with the client.
|
||||
And the changed SOCKET is not listening any more and is dedicated for communicating with the client. \n
|
||||
If there're many listen SOCKET with same listen port number and a client requests a connection,
|
||||
the SOCKET which has the smallest SOCKET number accepts the request and is changed as communication SOCKET. \n
|
||||
Following figure shows network flow diagram by WIZnet SOCKET API.
|
||||
@image html WIZnet_SOCKET.jpg "<WIZnet SOCKET API>"
|
||||
*/
|
||||
#ifndef _SOCKET_H_
|
||||
#define _SOCKET_H_
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "wizchip_conf.h"
|
||||
|
||||
#define SOCKET uint8_t ///< SOCKET type define for legacy driver
|
||||
|
||||
#define SOCK_OK 1 ///< Result is OK about socket process.
|
||||
#define SOCK_BUSY 0 ///< Socket is busy on processing the operation. Valid only Non-block IO Mode.
|
||||
#define SOCK_FATAL -1000 ///< Result is fatal error about socket process.
|
||||
|
||||
#define SOCK_ERROR 0
|
||||
#define SOCKERR_SOCKNUM (SOCK_ERROR - 1) ///< Invalid socket number
|
||||
#define SOCKERR_SOCKOPT (SOCK_ERROR - 2) ///< Invalid socket option
|
||||
#define SOCKERR_SOCKINIT (SOCK_ERROR - 3) ///< Socket is not initialized or SIPR is Zero IP address when Sn_MR_TCP
|
||||
#define SOCKERR_SOCKCLOSED (SOCK_ERROR - 4) ///< Socket unexpectedly closed.
|
||||
#define SOCKERR_SOCKMODE (SOCK_ERROR - 5) ///< Invalid socket mode for socket operation.
|
||||
#define SOCKERR_SOCKFLAG (SOCK_ERROR - 6) ///< Invalid socket flag
|
||||
#define SOCKERR_SOCKSTATUS (SOCK_ERROR - 7) ///< Invalid socket status for socket operation.
|
||||
#define SOCKERR_ARG (SOCK_ERROR - 10) ///< Invalid argument.
|
||||
#define SOCKERR_PORTZERO (SOCK_ERROR - 11) ///< Port number is zero
|
||||
#define SOCKERR_IPINVALID (SOCK_ERROR - 12) ///< Invalid IP address
|
||||
#define SOCKERR_TIMEOUT (SOCK_ERROR - 13) ///< Timeout occurred
|
||||
#define SOCKERR_DATALEN (SOCK_ERROR - 14) ///< Data length is zero or greater than buffer max size.
|
||||
#define SOCKERR_BUFFER (SOCK_ERROR - 15) ///< Socket buffer is not enough for data communication.
|
||||
|
||||
#define SOCKFATAL_PACKLEN (SOCK_FATAL - 1) ///< Invalid packet length. Fatal Error.
|
||||
|
||||
#if (_WIZCHIP_ == W5100 || _WIZCHIP_ == W5100S || _WIZCHIP_ == W5200 || _WIZCHIP_ == W5300 || _WIZCHIP_ == W5500)
|
||||
/*
|
||||
SOCKET FLAG
|
||||
*/
|
||||
#define SF_ETHER_OWN (Sn_MR_MFEN) ///< In @ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet
|
||||
#define SF_IGMP_VER2 (Sn_MR_MC) ///< In @ref Sn_MR_UDP with \ref SF_MULTI_ENABLE, Select IGMP version 2.
|
||||
#define SF_TCP_NODELAY (Sn_MR_ND) ///< In @ref Sn_MR_TCP, Use to nodelayed ack.
|
||||
#define SF_MULTI_ENABLE (Sn_MR_MULTI) ///< In @ref Sn_MR_UDP, Enable multicast mode.
|
||||
|
||||
#define Sn_MR2_DHAM (1<<1)
|
||||
#define SF_DHA_MANUAL (Sn_MR2_DHAM)
|
||||
#define Sn_MR2_FARP (1<<0)
|
||||
#define SF_FORCE_ARP (Sn_MR2_FARP)
|
||||
|
||||
|
||||
#if _WIZCHIP_ == 5500
|
||||
#define SF_BROAD_BLOCK (Sn_MR_BCASTB) ///< In @ref Sn_MR_UDP or @ref Sn_MR_MACRAW, Block broadcast packet. Valid only in W5500
|
||||
#define SF_MULTI_BLOCK (Sn_MR_MMB) ///< In @ref Sn_MR_MACRAW, Block multicast packet. Valid only in W5500
|
||||
#define SF_IPv6_BLOCK (Sn_MR_MIP6B) ///< In @ref Sn_MR_MACRAW, Block IPv6 packet. Valid only in W5500
|
||||
#define SF_UNI_BLOCK (Sn_MR_UCASTB) ///< In @ref Sn_MR_UDP with \ref SF_MULTI_ENABLE. Valid only in W5500
|
||||
#endif
|
||||
|
||||
//A201505 : For W5300
|
||||
#if _WIZCHIP_ == 5300
|
||||
#define SF_TCP_ALIGN 0x02 ///< Valid only \ref Sn_MR_TCP and W5300, refer to \ref Sn_MR_ALIGN
|
||||
#endif
|
||||
|
||||
#define SF_IO_NONBLOCK 0x01 ///< Socket nonblock io mode. It used parameter in \ref socket().
|
||||
|
||||
/*
|
||||
UDP & MACRAW Packet Infomation
|
||||
*/
|
||||
#define PACK_FIRST 0x80 ///< In Non-TCP packet, It indicates to start receiving a packet. (When W5300, This flag can be applied)
|
||||
#define PACK_REMAINED 0x01 ///< In Non-TCP packet, It indicates to remain a packet to be received. (When W5300, This flag can be applied)
|
||||
#define PACK_COMPLETED 0x00 ///< In Non-TCP packet, It indicates to complete to receive a packet. (When W5300, This flag can be applied)
|
||||
//A20150601 : For Integrating with W5300
|
||||
#define PACK_FIFOBYTE 0x02 ///< Valid only W5300, It indicate to have read already the Sn_RX_FIFOR.
|
||||
//
|
||||
//teddy 240122
|
||||
|
||||
#define PACK_IPv6 (1<<7) ///< It indicates the destination IP address of the received packet is IPv6 or IPv4.
|
||||
#define PACK_IPV6_ALLNODE (PACK_IPv6 | (1<<6)) ///< It indicates the destination IP address of the received packet is allnode multicast(broadcast) address or not.
|
||||
#define PACK_IPV6_MULTI (PACK_IPv6 | (1<<5)) ///< It indicates the destination IP address of the received packet is multicast address or not.
|
||||
#define PACK_IPV6_LLA (PACK_IPv6 | (1<<4)) ///< It indicates the destination IP address of the received packet is lla or gua.
|
||||
#define PACK_NONE (0x00) ///< It indicates no information of a packet
|
||||
|
||||
#elif ((_WIZCHIP_ == 6100) || (_WIZCHIP_ == 6300))
|
||||
|
||||
/*
|
||||
- @ref Sn_MR_MULTI : Support UDP Multicasting
|
||||
- @ref Sn_MR_MF : Support MAC Filter Enable
|
||||
- @ref Sn_MR_BRDB : Broadcast Block
|
||||
- @ref Sn_MR_FPSH : Force PSH flag
|
||||
- @ref Sn_MR_ND : No Delay ACK flag
|
||||
- @ref Sn_MR_MC : IGMP ver2, ver1
|
||||
- @ref Sn_MR_SMB : Solicited Multicast Block
|
||||
- @ref Sn_MR_MMB : IPv4 Multicast block
|
||||
- @ref Sn_MR_UNIB : Unicast Block
|
||||
- @ref Sn_MR_MMB6 : IPv6 UDP Multicast Block </b>
|
||||
|
||||
- @ref Sn_MR2_DHAM : @ref Sn_MR2_DHAM_AUTO, @ref Sn_MR2_DHAM_MANUAL
|
||||
- @ref Sn_MR_FARP
|
||||
*/
|
||||
|
||||
/*
|
||||
SOCKET FLAG
|
||||
*/
|
||||
/**
|
||||
@brief In UDP mode such as @ref Sn_MR_UDP4 and @ref Sn_MR_UDP6, @ref Sn_MR_UDP6, Enable multicast mode. When @ref Sn_MR_UDP6, Enable only IPv6 Multicating.
|
||||
*/
|
||||
#define SF_MULTI_ENABLE (Sn_MR_MULTI)
|
||||
#define SF_ETHER_OWN (Sn_MR_MF) ///< In MACRAW mode such as @ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet
|
||||
|
||||
/**
|
||||
@brief In UDP mode such as @ref Sn_MR_UDP4, @ref Sn_MR_UDP6 and @ref Sn_MR_UDPD, or In MACRAW mode sucha as @ref Sn_MR_MACRAW, Block a broadcast packet.
|
||||
*/
|
||||
#define SF_BROAD_BLOCK (Sn_MR_BRDB)
|
||||
#define SF_TCP_FPSH (Sn_MR_FPSH) ///< In TCP mode such as @ref Sn_MR_TCP4, @ref Sn_MR_TCP6 and @ref Sn_MR_TCPD, Use to forced push flag.
|
||||
|
||||
#define SF_TCP_NODELAY (Sn_MR_ND) ///< In TCP mode such as @ref Sn_MR_TCP4, @ref Sn_MR_TCP6 and @ref Sn_MR_TCPD, Use to nodelayed ack.
|
||||
#define SF_IGMP_VER2 (Sn_MR_MC) ///< In UDP mode such as @ref Sn_MR_UDP4 with @ref SF_MULTI_ENABLE, Select IGMP version 2.
|
||||
#define SF_SOLICIT_BLOCK (Sn_MR_SMB) ///< In UDP mode such as @ref Sn_MR_UDP6 and @ref Sn_MR_UDPD, Block a solicited mutlicast packet.
|
||||
#define SF_ETHER_MULTI4B (Sn_MR_MMB4) ///< In MACRAW mode such as @ref Sn_MR_MACRAW with @ref SF_MULTI_ENABLE, Block a IPv4 multicast packet.
|
||||
|
||||
#define SF_UNI_BLOCK (Sn_MR_UNIB) ///< In UDP mdoe such as @ref Sn_MR_UDP4, @ref Sn_MR_UDP6 and @ref Sn_MR_UDPD with @ref SF_MULTI_ENABLE, Block a unicast packet.
|
||||
#define SF_ETHER_MULIT6B (Sn_MR_MMB6) ///< In MACRAW mode such as @ref Sn_MR_MACRAW with @ref SF_MULTI_ENABLE, Block a IPv6 multicast packet.
|
||||
|
||||
/**
|
||||
@brief Force to APR.
|
||||
@details In datagram mode such as @ref Sn_MR_IPRAW4, @ref Sn_MR_IPRAW6, @ref Sn_MR_UDP4, @ref Sn_MR_UDP6, and @ref Sn_MR_UDPD,
|
||||
Force to request ARP before a packet is sent to a destination.\n
|
||||
In TCP mode such as @ref Sn_MR_TCP4, @ref Sn_MR_TCP6, and @ref Sn_MR_TCPD and <b>TCP SERVER</b> operation mode,
|
||||
Force to request ARP before SYN/ACK packet is sent to a <b>TCP CLIENT</b>. \n
|
||||
When @ref SF_DHA_MANUAL is set, the ARP is process but the destination hardware address is fixed by user.
|
||||
*/
|
||||
#define SF_FORCE_ARP (Sn_MR2_FARP)
|
||||
|
||||
/**
|
||||
@brief The destination hardware address of packet to be transmitted is set by user through @ref _Sn_DHAR_. It is invalid in MACRAW mode such as @ref Sn_MR_MACRAW.
|
||||
*/
|
||||
#define SF_DHA_MANUAL (Sn_MR2_DHAM)
|
||||
|
||||
#define SF_IO_NONBLOCK (0x01 << 3) ///< Socket nonblock io mode. It used parameter in @ref socket().
|
||||
|
||||
/*
|
||||
UDP, IPRAW, MACRAW Packet Infomation
|
||||
*/
|
||||
#define PACK_IPv6 (1<<7) ///< It indicates the destination IP address of the received packet is IPv6 or IPv4.
|
||||
#define PACK_IPV6_ALLNODE (PACK_IPv6 | (1<<6)) ///< It indicates the destination IP address of the received packet is allnode multicast(broadcast) address or not.
|
||||
#define PACK_IPV6_MULTI (PACK_IPv6 | (1<<5)) ///< It indicates the destination IP address of the received packet is multicast address or not.
|
||||
#define PACK_IPV6_LLA (PACK_IPv6 | (1<<4)) ///< It indicates the destination IP address of the received packet is lla or gua.
|
||||
#define PACK_COMPLETED (1<<3) ///< It indicates the read data is last in the received packet.
|
||||
#define PACK_REMAINED (1<<2) ///< It indicates to remain data in the received packet
|
||||
#define PACK_FIRST (1<<1) ///< It indicates the read data is first in the received packet.
|
||||
#define PACK_NONE (0x00) ///< It indicates no information of a packet
|
||||
|
||||
#define SRCV6_PREFER_AUTO (PSR_AUTO) ///< Soruce IPv6 address is preferred to auto-selection. Refer to @ref _Sn_PSR_
|
||||
#define SRCV6_PREFER_LLA (PSR_LLA) ///< Soruce IPv6 address is preferred to link local address. Refer to @ref _Sn_PSR_
|
||||
#define SRCV6_PREFER_GUA (PSR_GUA) ///< Soruce IPv6 address is preferred to global unique address. Refer to @ref _Sn_PSR_
|
||||
|
||||
#define TCPSOCK_MODE (Sn_ESR_TCPM) ///< It indicates the IP version when SOCKETn is opened as TCP6 or TCPD mode.(0 - IPv4 , 1 - IPv6)
|
||||
#define TCPSOCK_OP (Sn_ESR_TCPOP) ///< It indicates the operation mode when SOCKETn is connected.(0 - <b>TCP CLIENT</b> , 1 - <b>TCP SERVER</b>)
|
||||
#define TCPSOCK_SIP (Sn_ESR_IP6T) ///< It indicates the source ip address type when SOCKET is connected. (0 - Link Local, 1 - Global Unique)
|
||||
|
||||
/////////////////////////////
|
||||
// SOCKET CONTROL & OPTION //
|
||||
/////////////////////////////
|
||||
#define SOCK_IO_BLOCK 0 ///< Socket Block IO Mode in @ref setsockopt().
|
||||
#define SOCK_IO_NONBLOCK 1 ///< Socket Non-block IO Mode in @ref setsockopt().
|
||||
#endif
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Open a socket.
|
||||
@details Initializes the socket with 'sn' passed as parameter and open.
|
||||
|
||||
@param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
|
||||
@param protocol Protocol type to operate such as TCP, UDP and MACRAW.
|
||||
@param port Port number to be bined.
|
||||
@param flag Socket flags as \ref SF_ETHER_OWN, \ref SF_IGMP_VER2, \ref SF_TCP_NODELAY, \ref SF_MULTI_ENABLE, \ref SF_IO_NONBLOCK and so on.\n
|
||||
Valid flags only in W5500 : @ref SF_BROAD_BLOCK, @ref SF_MULTI_BLOCK, @ref SF_IPv6_BLOCK, and @ref SF_UNI_BLOCK.
|
||||
@sa Sn_MR
|
||||
|
||||
@return @b Success : The socket number @b 'sn' passed as parameter\n
|
||||
@b Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number\n
|
||||
@ref SOCKERR_SOCKMODE - Not support socket mode as TCP, UDP, and so on. \n
|
||||
@ref SOCKERR_SOCKFLAG - Invaild socket flag.
|
||||
*/
|
||||
int8_t socket(uint8_t sn, uint8_t protocol, uint16_t port, uint8_t flag);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Close a socket.
|
||||
@details It closes the socket with @b'sn' passed as parameter.
|
||||
|
||||
@param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
|
||||
|
||||
@return @b Success : @ref SOCK_OK \n
|
||||
@b Fail : @ref SOCKERR_SOCKNUM - Invalid socket number
|
||||
*/
|
||||
int8_t close(uint8_t sn);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Listen to a connection request from a client.
|
||||
@details It is listening to a connection request from a client.
|
||||
If connection request is accepted successfully, the connection is established. Socket sn is used in passive(server) mode.
|
||||
|
||||
@param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
|
||||
@return @b Success : @ref SOCK_OK \n
|
||||
@b Fail :\n @ref SOCKERR_SOCKINIT - Socket is not initialized \n
|
||||
@ref SOCKERR_SOCKCLOSED - Socket closed unexpectedly.
|
||||
*/
|
||||
int8_t listen(uint8_t sn);
|
||||
|
||||
//teddy 240122
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Try to connect to a <b>TCP SERVER</b>.
|
||||
@details It sends a connection-reqeust message to the server with destination IP address and port number passed as parameter.\n
|
||||
SOCKET <i>sn</i> is used as active(<b>TCP CLIENT</b>) mode.
|
||||
@param sn SOCKET number. It should be <b>0 ~ @ref _WIZCHIP_SOCK_NUM_</b>.
|
||||
@param addr Pointer variable of destination IPv6 or IPv4 address.
|
||||
@param port Destination port number.
|
||||
@param addrlen the length of <i>addr</i>. \n <- removed
|
||||
If addr is IPv6 address it should be 16,else if addr is IPv4 address it should be 4. Otherwize, return @ref SOCKERR_IPINVALID.
|
||||
@return Success : @ref SOCK_OK \n
|
||||
Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number\n
|
||||
@ref SOCKERR_SOCKMODE - Invalid socket mode\n
|
||||
@ref SOCKERR_SOCKINIT - Socket is not initialized\n
|
||||
@ref SOCKERR_IPINVALID - Wrong server IP address\n
|
||||
@ref SOCKERR_PORTZERO - Server port zero\n
|
||||
@ref SOCKERR_TIMEOUT - Timeout occurred during request connection\n
|
||||
@ref SOCK_BUSY - In non-block io mode, it returns immediately\n
|
||||
@note It is valid only in TCP client mode. \n
|
||||
In block io mode, it does not return until connection is completed. \n
|
||||
In Non-block io mode(@ref SF_IO_NONBLOCK), it returns @ref SOCK_BUSY immediately.
|
||||
*/
|
||||
static int8_t connect_IO_6(uint8_t sn, uint8_t * addr, uint16_t port, uint8_t addrlen);
|
||||
//int8_t connect(uint8_t sn, uint8_t * addr, uint16_t port, uint8_t addrlen);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Try to disconnect a connection socket.
|
||||
@details It sends request message to disconnect the TCP socket 'sn' passed as parameter to the server or client.
|
||||
@note It is valid only in TCP server or client mode. \n
|
||||
In block io mode, it does not return until disconnection is completed. \n
|
||||
In Non-block io mode, it return @ref SOCK_BUSY immediately. \n
|
||||
|
||||
@param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
|
||||
@return @b Success : @ref SOCK_OK \n
|
||||
@b Fail :\n @ref SOCKERR_SOCKNUM - Invalid socket number \n
|
||||
@ref SOCKERR_SOCKMODE - Invalid operation in the socket \n
|
||||
@ref SOCKERR_TIMEOUT - Timeout occurred \n
|
||||
@ref SOCK_BUSY - Socket is busy.
|
||||
*/
|
||||
int8_t disconnect(uint8_t sn);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Send data to the connected peer in TCP socket.
|
||||
@details It is used to send outgoing data to the connected socket.
|
||||
@note It is valid only in TCP server or client mode. It can't send data greater than socket buffer size. \n
|
||||
In block io mode, It doesn't return until data send is completed - socket buffer size is greater than data. \n
|
||||
In non-block io mode, It return @ref SOCK_BUSY immediately when socket buffer is not enough. \n
|
||||
@param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
|
||||
@param buf Pointer buffer containing data to be sent.
|
||||
@param len The byte length of data in buf.
|
||||
@return @b Success : The sent data size \n
|
||||
@b Fail : \n @ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n
|
||||
@ref SOCKERR_TIMEOUT - Timeout occurred \n
|
||||
@ref SOCKERR_SOCKMODE - Invalid operation in the socket \n
|
||||
@ref SOCKERR_SOCKNUM - Invalid socket number \n
|
||||
@ref SOCKERR_DATALEN - zero data length \n
|
||||
@ref SOCK_BUSY - Socket is busy.
|
||||
*/
|
||||
int32_t send(uint8_t sn, uint8_t * buf, uint16_t len);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Receive data from the connected peer.
|
||||
@details It is used to read incoming data from the connected socket.\n
|
||||
It waits for data as much as the application wants to receive.
|
||||
@note It is valid only in TCP server or client mode. It can't receive data greater than socket buffer size. \n
|
||||
In block io mode, it doesn't return until data reception is completed - data is filled as <I>len</I> in socket buffer. \n
|
||||
In non-block io mode, it return @ref SOCK_BUSY immediately when <I>len</I> is greater than data size in socket buffer. \n
|
||||
|
||||
@param sn Socket number. It should be <b>0 ~ @ref \_WIZCHIP_SOCK_NUM_</b>.
|
||||
@param buf Pointer buffer to read incoming data.
|
||||
@param len The max data length of data in buf.
|
||||
@return @b Success : The real received data size \n
|
||||
@b Fail :\n
|
||||
@ref SOCKERR_SOCKSTATUS - Invalid socket status for socket operation \n
|
||||
@ref SOCKERR_SOCKMODE - Invalid operation in the socket \n
|
||||
@ref SOCKERR_SOCKNUM - Invalid socket number \n
|
||||
@ref SOCKERR_DATALEN - zero data length \n
|
||||
@ref SOCK_BUSY - Socket is busy.
|
||||
*/
|
||||
int32_t recv(uint8_t sn, uint8_t * buf, uint16_t len);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Send datagram to the peer specifed by destination IP address and port number passed as parameter.
|
||||
@details It sends datagram data by using UDP,IPRAW, or MACRAW mode SOCKET.
|
||||
@param sn SOCKET number. It should be <b>0 ~ @ref _WIZCHIP_SOCK_NUM_</b>.
|
||||
@param buf Pointer of data buffer to be sent.
|
||||
@param len The byte length of data in buf.
|
||||
@param addr Pointer variable of destination IPv6 or IPv4 address.
|
||||
@param port Destination port number.
|
||||
@param addrlen the length of <i>addr</i>. \n
|
||||
If addr is IPv6 address it should be 16,else if addr is IPv4 address it should be 4. Otherwize, return @ref SOCKERR_IPINVALID.
|
||||
@return Success : The real sent data size. It may be equal to <i>len</i> or small.\n
|
||||
Fail :\n @ref SOCKERR_SOCKNUM - Invalid SOCKET number \n
|
||||
@ref SOCKERR_SOCKMODE - Invalid operation in the SOCKET \n
|
||||
@ref SOCKERR_SOCKSTATUS - Invalid SOCKET status for SOCKET operation \n
|
||||
@ref SOCKERR_IPINVALID - Invalid IP address\n
|
||||
@ref SOCKERR_PORTZERO - Destination port number is zero\n
|
||||
@ref SOCKERR_DATALEN - Invalid data length \n
|
||||
@ref SOCKERR_SOCKCLOSED - SOCKET unexpectedly closed \n
|
||||
@ref SOCKERR_TIMEOUT - Timeout occurred \n
|
||||
@ref SOCK_BUSY - SOCKET is busy.
|
||||
@note It is valid only in @ref Sn_MR_UDP4, @ref Sn_MR_UDP6, @ref Sn_MR_UDPD, @ref Sn_MR_IPRAW4, @ref Sn_MR_IPRAW6, and @ref Sn_MR_MACRAW. \n
|
||||
In UDP mode, It can send data as many as SOCKET RX buffer size if data is greater than SOCKET TX buffer size. \n
|
||||
In IPRAW and MACRAW mode, It should send data as many as MTU(maxium transmission unit) if data is greater than MTU. That is, <i>len</i> can't exceed to MTU.
|
||||
In block io mode, It doesn't return until data send is completed.
|
||||
In non-block io mode(@ref SF_IO_NONBLOCK), It return @ref SOCK_BUSY immediately when SOCKET transimttable buffer size is not enough.
|
||||
*/
|
||||
//int32_t sendto(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port, uint8_t addrlen);
|
||||
static int32_t sendto_IO_6(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port, uint8_t addrlen);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Receive datagram from a peer
|
||||
@details It can read a data received from a peer by using UDP, IPRAW, or MACRAW mode SOCKET.
|
||||
@param sn SOCKET number. It should be <b>0 ~ @ref _WIZCHIP_SOCK_NUM_</b>.
|
||||
@param buf Pointer buffer to be saved the received data.
|
||||
@param len The max read data length. \n
|
||||
When the received packet size <= <i>len</i>, it can read data as many as the packet size. \n
|
||||
When others, it can read data as many as len and remain to the rest data of the packet.
|
||||
@param addr Pointer variable of destination IP address.\n
|
||||
It is valid only when @ref recvfrom() is first called for receiving the datagram packet.
|
||||
You can check it valid or not through @ref PACK_FIRST. You can get it through @ref getsockopt(sn, @ref SO_PACKINFO, &packinfo).\n
|
||||
In UDP4, IPRAW mode SOCKET, it should be allocated over 4bytes. \n
|
||||
In UDP6, UDPD mode SOCKET, it should be allocated over 16bytes.
|
||||
@param port Pointer variable of destination port number. \n
|
||||
It is valid only when @ref recvfrom() is first called for receiving the datagram packet, same as <i>port</i> case.
|
||||
@param addrlen The byte length of destination IP address. \n
|
||||
It is valid only when @ref recvfrom() is first called for receiving the datagram packet, same as <i>port</i> case.\n
|
||||
When the destination has a IPv4 address, it is set to 4. \n
|
||||
when the destination has a IPv6 address, it is set to 16.
|
||||
@return Success : The real received data size. It may be equal to <i>len</i> or small.\n
|
||||
Fail : @ref SOCKERR_SOCKMODE - Invalid operation in the socket \n
|
||||
@ref SOCKERR_SOCKNUM - Invalid socket number \n
|
||||
@ref SOCKERR_ARG - Invalid parameter such as <i>addr</i>, <i>port</i>
|
||||
@ref SOCK_BUSY - SOCKET is busy.
|
||||
@note It is valid only in @ref Sn_MR_UDP4, @ref Sn_MR_UDP6, @ref Sn_MR_UDPD, @ref Sn_MR_IPRAW4, @ref Sn_MR_IPRAW6, and @ref Sn_MR_MACRAW. \n
|
||||
When SOCKET is opened with @ref Sn_MR_MACRAW or When it reads the the remained data of the previous datagram packet,
|
||||
the parameters such as <i>addr</i>, <i>port</i>, <i>addrlen</i> is ignored. \n
|
||||
Also, It can read data as many as the received datagram packet size if <i>len</i> is greater than the datagram packet size. \n
|
||||
In block io mode, it doesn't return until data reception is completed. that is, it waits until any datagram packet is received in SOCKET RX buffer. \n
|
||||
In non-block io mode(@ref SF_IO_NONBLOCK), it return @ref SOCK_BUSY immediately when SOCKET RX buffer is empty. \n
|
||||
*/
|
||||
//int32_t recvfrom(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port, uint8_t *addrlen);
|
||||
static int32_t recvfrom_IO_6(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port, uint8_t *addrlen);
|
||||
|
||||
|
||||
/////////////////////////////
|
||||
// SOCKET CONTROL & OPTION //
|
||||
/////////////////////////////
|
||||
#define SOCK_IO_BLOCK 0 ///< Socket Block IO Mode in @ref setsockopt().
|
||||
#define SOCK_IO_NONBLOCK 1 ///< Socket Non-block IO Mode in @ref setsockopt().
|
||||
|
||||
/**
|
||||
@defgroup DATA_TYPE DATA TYPE
|
||||
*/
|
||||
|
||||
/**
|
||||
@ingroup DATA_TYPE
|
||||
@brief The kind of Socket Interrupt.
|
||||
@sa Sn_IR, Sn_IMR, setSn_IR(), getSn_IR(), setSn_IMR(), getSn_IMR()
|
||||
*/
|
||||
typedef enum {
|
||||
SIK_CONNECTED = (1 << 0), ///< connected
|
||||
SIK_DISCONNECTED = (1 << 1), ///< disconnected
|
||||
SIK_RECEIVED = (1 << 2), ///< data received
|
||||
SIK_TIMEOUT = (1 << 3), ///< timeout occurred
|
||||
SIK_SENT = (1 << 4), ///< send ok
|
||||
//M20150410 : Remove the comma of last member
|
||||
//SIK_ALL = 0x1F, ///< all interrupt
|
||||
SIK_ALL = 0x1F ///< all interrupt
|
||||
} sockint_kind;
|
||||
|
||||
/**
|
||||
@ingroup DATA_TYPE
|
||||
@brief The type of @ref ctlsocket().
|
||||
*/
|
||||
typedef enum {
|
||||
CS_SET_IOMODE, ///< set socket IO mode with @ref SOCK_IO_BLOCK or @ref SOCK_IO_NONBLOCK
|
||||
CS_GET_IOMODE, ///< get socket IO mode
|
||||
CS_GET_MAXTXBUF, ///< get the size of socket buffer allocated in TX memory
|
||||
CS_GET_MAXRXBUF, ///< get the size of socket buffer allocated in RX memory
|
||||
CS_CLR_INTERRUPT, ///< clear the interrupt of socket with @ref sockint_kind
|
||||
CS_GET_INTERRUPT, ///< get the socket interrupt. refer to @ref sockint_kind
|
||||
|
||||
//teddy 240122
|
||||
//#if _WIZCHIP_ == W6100 || _WIZCHIP_ == W6300
|
||||
CS_SET_PREFER, ///< set the preferred source IPv6 address of transmission packet.\n Refer to @ref SRCV6_PREFER_AUTO, @ref SRCV6_PREFER_LLA and @ref SRCV6_PREFER_GUA.
|
||||
CS_GET_PREFER, ///< get the preferred source IPv6 address of transmission packet.\n Refer to @ref SRCV6_PREFER_AUTO, @ref SRCV6_PREFER_LLA and @ref SRCV6_PREFER_GUA.
|
||||
//#endif
|
||||
#if _WIZCHIP_ >= 5100
|
||||
CS_SET_INTMASK, ///< set the interrupt mask of socket with @ref sockint_kind, Not supported in W5100
|
||||
CS_GET_INTMASK ///< get the masked interrupt of socket. refer to @ref sockint_kind, Not supported in W5100
|
||||
#endif
|
||||
} ctlsock_type;
|
||||
|
||||
|
||||
/**
|
||||
@ingroup DATA_TYPE
|
||||
@brief The type of socket option in @ref setsockopt() or @ref getsockopt()
|
||||
*/
|
||||
typedef enum {
|
||||
SO_FLAG, ///< Valid only in getsockopt(), For set flag of socket refer to <I>flag</I> in @ref socket().
|
||||
SO_TTL, ///< Set TTL. @ref Sn_TTL ( @ref setSn_TTL(), @ref getSn_TTL() )
|
||||
SO_TOS, ///< Set TOS. @ref Sn_TOS ( @ref setSn_TOS(), @ref getSn_TOS() )
|
||||
SO_MSS, ///< Set MSS. @ref Sn_MSSR ( @ref setSn_MSSR(), @ref getSn_MSSR() )
|
||||
SO_DESTIP, ///< Set the destination IP address. @ref Sn_DIPR ( @ref setSn_DIPR(), @ref getSn_DIPR() )
|
||||
SO_DESTPORT, ///< Set the destination Port number. @ref Sn_DPORT ( @ref setSn_DPORT(), @ref getSn_DPORT() )
|
||||
#if _WIZCHIP_ != 5100
|
||||
SO_KEEPALIVESEND, ///< Valid only in setsockopt. Manually send keep-alive packet in TCP mode, Not supported in W5100
|
||||
#if !( (_WIZCHIP_ == 5100) || (_WIZCHIP_ == 5200) )
|
||||
SO_KEEPALIVEAUTO, ///< Set/Get keep-alive auto transmission timer in TCP mode, Not supported in W5100, W5200
|
||||
#endif
|
||||
#endif
|
||||
SO_SENDBUF, ///< Valid only in getsockopt. Get the free data size of Socekt TX buffer. @ref Sn_TX_FSR, @ref getSn_TX_FSR()
|
||||
SO_RECVBUF, ///< Valid only in getsockopt. Get the received data size in socket RX buffer. @ref Sn_RX_RSR, @ref getSn_RX_RSR()
|
||||
SO_STATUS, ///< Valid only in getsockopt. Get the socket status. @ref Sn_SR, @ref getSn_SR()
|
||||
|
||||
//teddy 240122
|
||||
//#if _WIZCHIP_ == W6100 || _WIZCHIP_ == W6300
|
||||
SO_EXTSTATUS, ///< Valid only in @ref getsockopt(). Get the extended TCP SOCKETn status. @ref getSn_ESR()
|
||||
SO_MODE,
|
||||
//#endif
|
||||
SO_REMAINSIZE, ///< Valid only in getsockopt. Get the remained packet size in other then TCP mode.
|
||||
SO_PACKINFO ///< Valid only in getsockopt. Get the packet information as @ref PACK_FIRST, @ref PACK_REMAINED, and @ref PACK_COMPLETED in other then TCP mode.
|
||||
} sockopt_type;
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Control socket.
|
||||
@details Control IO mode, Interrupt & Mask of socket and get the socket buffer information.
|
||||
Refer to @ref ctlsock_type.
|
||||
@param sn socket number
|
||||
@param cstype type of control socket. refer to @ref ctlsock_type.
|
||||
@param arg Data type and value is determined according to @ref ctlsock_type. \n
|
||||
<table>
|
||||
<tr> <td> @b cstype </td> <td> @b data type</td><td>@b value</td></tr>
|
||||
<tr> <td> @ref CS_SET_IOMODE \n @ref CS_GET_IOMODE </td> <td> uint8_t </td><td>@ref SOCK_IO_BLOCK @ref SOCK_IO_NONBLOCK</td></tr>
|
||||
<tr> <td> @ref CS_GET_MAXTXBUF \n @ref CS_GET_MAXRXBUF </td> <td> uint16_t </td><td> 0 ~ 16K </td></tr>
|
||||
<tr> <td> @ref CS_CLR_INTERRUPT \n @ref CS_GET_INTERRUPT \n @ref CS_SET_INTMASK \n @ref CS_GET_INTMASK </td> <td> @ref sockint_kind </td><td> @ref SIK_CONNECTED, etc. </td></tr>
|
||||
</table>
|
||||
@return @b Success @ref SOCK_OK \n
|
||||
@b fail @ref SOCKERR_ARG - Invalid argument\n
|
||||
*/
|
||||
int8_t ctlsocket(uint8_t sn, ctlsock_type cstype, void* arg);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief set socket options
|
||||
@details Set socket option like as TTL, MSS, TOS, and so on. Refer to @ref sockopt_type.
|
||||
|
||||
@param sn socket number
|
||||
@param sotype socket option type. refer to @ref sockopt_type
|
||||
@param arg Data type and value is determined according to <I>sotype</I>. \n
|
||||
<table>
|
||||
<tr> <td> @b sotype </td> <td> @b data type</td><td>@b value</td></tr>
|
||||
<tr> <td> @ref SO_TTL </td> <td> uint8_t </td><td> 0 ~ 255 </td> </tr>
|
||||
<tr> <td> @ref SO_TOS </td> <td> uint8_t </td><td> 0 ~ 255 </td> </tr>
|
||||
<tr> <td> @ref SO_MSS </td> <td> uint16_t </td><td> 0 ~ 65535 </td> </tr>
|
||||
<tr> <td> @ref SO_DESTIP </td> <td> uint8_t[4] </td><td> </td></tr>
|
||||
<tr> <td> @ref SO_DESTPORT </td> <td> uint16_t </td><td> 0 ~ 65535 </td></tr>
|
||||
<tr> <td> @ref SO_KEEPALIVESEND </td> <td> null </td><td> null </td></tr>
|
||||
<tr> <td> @ref SO_KEEPALIVEAUTO </td> <td> uint8_t </td><td> 0 ~ 255 </td></tr>
|
||||
</table>
|
||||
@return
|
||||
- @b Success : @ref SOCK_OK \n
|
||||
- @b Fail
|
||||
- @ref SOCKERR_SOCKNUM - Invalid Socket number \n
|
||||
- @ref SOCKERR_SOCKMODE - Invalid socket mode \n
|
||||
- @ref SOCKERR_SOCKOPT - Invalid socket option or its value \n
|
||||
- @ref SOCKERR_TIMEOUT - Timeout occurred when sending keep-alive packet \n
|
||||
*/
|
||||
int8_t setsockopt(uint8_t sn, sockopt_type sotype, void* arg);
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief get socket options
|
||||
@details Get socket option like as FLAG, TTL, MSS, and so on. Refer to @ref sockopt_type
|
||||
@param sn socket number
|
||||
@param sotype socket option type. refer to @ref sockopt_type
|
||||
@param arg Data type and value is determined according to <I>sotype</I>. \n
|
||||
<table>
|
||||
<tr> <td> @b sotype </td> <td>@b data type</td><td>@b value</td></tr>
|
||||
<tr> <td> @ref SO_FLAG </td> <td> uint8_t </td><td> @ref SF_ETHER_OWN, etc... </td> </tr>
|
||||
<tr> <td> @ref SO_TOS </td> <td> uint8_t </td><td> 0 ~ 255 </td> </tr>
|
||||
<tr> <td> @ref SO_MSS </td> <td> uint16_t </td><td> 0 ~ 65535 </td> </tr>
|
||||
<tr> <td> @ref SO_DESTIP </td> <td> uint8_t[4] </td><td> </td></tr>
|
||||
<tr> <td> @ref SO_DESTPORT </td> <td> uint16_t </td><td> </td></tr>
|
||||
<tr> <td> @ref SO_KEEPALIVEAUTO </td> <td> uint8_t </td><td> 0 ~ 255 </td></tr>
|
||||
<tr> <td> @ref SO_SENDBUF </td> <td> uint16_t </td><td> 0 ~ 65535 </td></tr>
|
||||
<tr> <td> @ref SO_RECVBUF </td> <td> uint16_t </td><td> 0 ~ 65535 </td></tr>
|
||||
<tr> <td> @ref SO_STATUS </td> <td> uint8_t </td><td> @ref SOCK_ESTABLISHED, etc.. </td></tr>
|
||||
<tr> <td> @ref SO_REMAINSIZE </td> <td> uint16_t </td><td> 0~ 65535 </td></tr>
|
||||
<tr> <td> @ref SO_PACKINFO </td> <td> uint8_t </td><td> @ref PACK_FIRST, etc... </td></tr>
|
||||
</table>
|
||||
@return
|
||||
- @b Success : @ref SOCK_OK \n
|
||||
- @b Fail
|
||||
- @ref SOCKERR_SOCKNUM - Invalid Socket number \n
|
||||
- @ref SOCKERR_SOCKOPT - Invalid socket option or its value \n
|
||||
- @ref SOCKERR_SOCKMODE - Invalid socket mode \n
|
||||
@note
|
||||
The option as PACK_REMAINED and SO_PACKINFO is valid only in NON-TCP mode and after call @ref recvfrom(). \n
|
||||
When SO_PACKINFO value is PACK_FIRST and the return value of recvfrom() is zero,
|
||||
This means the zero byte UDP data(UDP Header only) received.
|
||||
*/
|
||||
int8_t getsockopt(uint8_t sn, sockopt_type sotype, void* arg);
|
||||
|
||||
//teddy 240122
|
||||
#if _WIZCHIP_ == W6100 || _WIZCHIP_ == W6300
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief Peeks a sub-message in SOCKETn RX buffer
|
||||
@details It peeks the incoming message of SOCKETn RX buffer. \n
|
||||
It can find the specified sub-message in the incoming message and
|
||||
return the length of incoming message before the sub-message. \n
|
||||
It is useful when you need to read each messages from multiple message in SOCKET RX buffer.
|
||||
@param sn SOCKET number
|
||||
@param submsg sub-message pointer to find
|
||||
@param subsize the length of <i>submsg</i>
|
||||
@return
|
||||
- Success : the length of incoming message length before the <i>submsg</i> \n
|
||||
- Fail : -1
|
||||
@note
|
||||
It is just return the length of incoming message before the found sub-message. It does not receive the message.\n
|
||||
So, after calling peeksockmsg, @ref _Sn_RX_RD_ is not changed.
|
||||
*/
|
||||
int16_t peeksockmsg(uint8_t sn, uint8_t* submsg, uint16_t subsize);
|
||||
|
||||
#endif
|
||||
|
||||
// void setAddrlen_W6x00( uint8_t num) ;
|
||||
// uint8_t checkAddrlen_W6x00() ;
|
||||
|
||||
// void inline_setAddrlen_W6x00( uint8_t num);
|
||||
// uint8_t inline_CheckAddrlen_W6x00( void );
|
||||
|
||||
|
||||
#if 1 // by_Lihan
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief by_Lihan_W5x00
|
||||
*/
|
||||
int8_t connect_W5x00(uint8_t sn, uint8_t * addr, uint16_t port);
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief by_Lihan_Wx00
|
||||
*/
|
||||
int8_t connect_W6x00(uint8_t sn, uint8_t * addr, uint16_t port, uint8_t addrlen);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define GET_MACRO_connect(_1, _2, _3, _4, NAME, ...) NAME
|
||||
#define CHOOSE_TESTCODE_MACRO(...) GET_MACRO_connect(__VA_ARGS__, connect_4, connect_3)
|
||||
|
||||
/**
|
||||
// by_LIhan for overroading
|
||||
// NOTE_LIHAN: Some sections of this code are not yet fully defined.
|
||||
@note
|
||||
In case of get 3 arguments - int8_t connect_W5x00(uint8_t sn, uint8_t * addr, uint16_t port );\n
|
||||
In case of get 4 arguments - int8_t connect_W6x00(uint8_t sn, uint8_t * addr, uint16_t port, uint8_t addrlen );
|
||||
*/
|
||||
|
||||
#define connect(...) CHOOSE_TESTCODE_MACRO(__VA_ARGS__)(__VA_ARGS__)
|
||||
|
||||
// In case of get 3 arguments
|
||||
#define connect_3(sn , addr , port ) connect_W5x00(sn , addr , port)
|
||||
|
||||
// In case of get 4 arguments
|
||||
#define connect_4(sn , addr , port, addrlen ) connect_W6x00(sn , addr , port,addrlen)
|
||||
|
||||
|
||||
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief by_Lihan
|
||||
*/
|
||||
int32_t sendto_W5x00(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port);
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief by_Lihan
|
||||
*/
|
||||
int32_t sendto_W6x00(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t port, uint8_t addrlen);
|
||||
|
||||
|
||||
#define GET_MACRO_sendto(_1, _2, _3, _4, _5 , _6, NAME, ...) NAME
|
||||
#define CHOOSE_sendto_MACRO(...) GET_MACRO_sendto(__VA_ARGS__, sendto_6, sendto_5)
|
||||
|
||||
// by_LIhan for overroading
|
||||
// NOTE_LIHAN: Some sections of this code are not yet fully defined.
|
||||
// In case of get 3 arguments - int8_t sendto_W5x00(uint8_t sn, uint8_t * addr, uint16_t port );
|
||||
// In case of get 4 arguments - int8_t sendto_W6x00(uint8_t sn, uint8_t * addr, uint16_t port,uint8_t addrlen );
|
||||
#define sendto(...) CHOOSE_sendto_MACRO(__VA_ARGS__)(__VA_ARGS__)
|
||||
|
||||
// In case of get 3 arguments
|
||||
#define sendto_5( sn, buf, len, addr, port ) sendto_W5x00( sn, buf, len, addr, port)
|
||||
|
||||
// In case of get 4 arguments
|
||||
#define sendto_6( sn, buf, len, addr, port, addrlen ) sendto_W6x00( sn, buf, len, addr, port, addrlen)
|
||||
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief byLihan_W5x00
|
||||
*/
|
||||
int32_t recvfrom_W5x00(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port);
|
||||
/**
|
||||
@ingroup WIZnet_socket_APIs
|
||||
@brief byLihan_Wx00
|
||||
*/
|
||||
int32_t recvfrom_W6x00(uint8_t sn, uint8_t * buf, uint16_t len, uint8_t * addr, uint16_t *port, uint8_t *addrlen);
|
||||
|
||||
|
||||
#define GET_MACRO_recvfrom(_1, _2, _3, _4, _5, _6 ,NAME, ...) NAME
|
||||
#define CHOOSE_recvfrom_MACRO(...) GET_MACRO_recvfrom(__VA_ARGS__, recvfrom_6, recvfrom_5)
|
||||
|
||||
// by_LIhanfor overroading
|
||||
// In case of get 3 arguments - int8_t recvfrom_W5x00(uint8_t sn, uint8_t * addr, uint16_t port );
|
||||
// In case of get 4 arguments - int8_t recvfrom_W6x00(uint8_t sn, uint8_t * addr, uint16_t port,uint8_t addrlen );
|
||||
#define recvfrom(...) CHOOSE_recvfrom_MACRO(__VA_ARGS__)(__VA_ARGS__)
|
||||
|
||||
// In case of get 3 arguments
|
||||
#define recvfrom_5(sn, buf, len, addr, port ) recvfrom_W5x00(sn, buf, len, addr, port)
|
||||
|
||||
// In case of get 4 arguments
|
||||
#define recvfrom_6(sn, buf, len, addr, port, addrlen ) recvfrom_W6x00(sn, buf, len, addr, port, addrlen )
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _SOCKET_H_
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,23 @@
|
||||
/**
|
||||
Copyright (c) 2021 WIZnet Co.,Ltd
|
||||
|
||||
SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _PORT_COMMON_H_
|
||||
#define _PORT_COMMON_H_
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Includes
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
/* Common */
|
||||
#include "pico/stdlib.h"
|
||||
#include "pico/binary_info.h"
|
||||
#include "pico/critical_section.h"
|
||||
#include "hardware/spi.h"
|
||||
#include "hardware/dma.h"
|
||||
#include "hardware/clocks.h"
|
||||
|
||||
#endif /* _PORT_COMMON_H_ */
|
||||
@@ -0,0 +1,753 @@
|
||||
/*
|
||||
Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
|
||||
|
||||
SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "pico/stdlib.h"
|
||||
#include "pico/error.h"
|
||||
|
||||
#include "hardware/dma.h"
|
||||
#include "hardware/clocks.h"
|
||||
|
||||
#include "wizchip_conf.h"
|
||||
#include "wizchip_qspi_pio.h"
|
||||
|
||||
#include "wizchip_qspi_pio.pio.h"
|
||||
|
||||
#ifndef PIO_SPI_PREFERRED_PIO
|
||||
#define PIO_SPI_PREFERRED_PIO 1
|
||||
#endif
|
||||
|
||||
#define PADS_DRIVE_STRENGTH PADS_BANK0_GPIO0_DRIVE_VALUE_12MA
|
||||
#define IRQ_SAMPLE_DELAY_NS 100
|
||||
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
#define PIO_PROGRAM_NAME wizchip_pio_spi_single_write_read
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
#define PIO_PROGRAM_NAME wizchip_pio_spi_dual_write_read
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
#define PIO_PROGRAM_NAME wizchip_pio_spi_quad_write_read
|
||||
#endif
|
||||
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
#define PIO_PROGRAM_FUNC __CONCAT(PIO_PROGRAM_NAME, _program)
|
||||
#define PIO_PROGRAM_GET_DEFAULT_CONFIG_FUNC __CONCAT(PIO_PROGRAM_NAME, _program_get_default_config)
|
||||
#define PIO_OFFSET_WRITE_BITS __CONCAT(PIO_PROGRAM_NAME, _offset_write_bits)
|
||||
#define PIO_OFFSET_WRITE_BITS_END __CONCAT(PIO_PROGRAM_NAME, _offset_write_bits_end)
|
||||
#define PIO_OFFSET_READ_BITS_END __CONCAT(PIO_PROGRAM_NAME, _offset_read_bits_end)
|
||||
|
||||
#else
|
||||
#define PIO_PROGRAM_NAME wiznet_spi_write_read
|
||||
#define PIO_PROGRAM_FUNC __CONCAT(PIO_PROGRAM_NAME, _program)
|
||||
#define PIO_PROGRAM_GET_DEFAULT_CONFIG_FUNC __CONCAT(PIO_PROGRAM_NAME, _program_get_default_config)
|
||||
#define PIO_OFFSET_WRITE_BITS __CONCAT(PIO_PROGRAM_NAME, _offset_write_bits)
|
||||
#define PIO_OFFSET_WRITE_BITS_END __CONCAT(PIO_PROGRAM_NAME, _offset_write_end)
|
||||
#define PIO_OFFSET_READ_BITS_END __CONCAT(PIO_PROGRAM_NAME, _offset_read_end)
|
||||
// All wiznet spi operations must start with writing a 3 byte header
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef PICO_WIZNET_SPI_PIO_INSTANCE_COUNT
|
||||
#define PICO_WIZNET_SPI_PIO_INSTANCE_COUNT 1
|
||||
#endif
|
||||
|
||||
#define SPI_HEADER_LEN 3
|
||||
|
||||
typedef struct spi_pio_state {
|
||||
wiznet_spi_funcs_t *funcs;
|
||||
const wiznet_spi_config_t *spi_config;
|
||||
pio_hw_t *pio;
|
||||
uint8_t pio_func_sel;
|
||||
int8_t pio_offset;
|
||||
int8_t pio_sm;
|
||||
int8_t dma_out;
|
||||
int8_t dma_in;
|
||||
uint8_t spi_header[SPI_HEADER_LEN];
|
||||
uint8_t spi_header_count;
|
||||
} spi_pio_state_t;
|
||||
|
||||
|
||||
|
||||
static spi_pio_state_t spi_pio_state[PICO_WIZNET_SPI_PIO_INSTANCE_COUNT];
|
||||
static spi_pio_state_t *active_state;
|
||||
|
||||
static void wiznet_spi_pio_close(wiznet_spi_handle_t funcs);
|
||||
static wiznet_spi_funcs_t *get_wiznet_spi_pio_impl(void);
|
||||
|
||||
|
||||
static uint16_t mk_cmd_buf(uint8_t *pdst, uint8_t opcode, uint16_t addr) {
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
|
||||
pdst[0] = opcode;
|
||||
pdst[1] = (uint8_t)((addr >> 8) & 0xFF);
|
||||
pdst[2] = (uint8_t)((addr >> 0) & 0xFF);
|
||||
pdst[3] = 0;
|
||||
|
||||
return 3 + 1;
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
pdst[0] = ((opcode >> 7 & 0x01) << 6) | ((opcode >> 6 & 0x01) << 4) | ((opcode >> 5 & 0x01) << 2) | ((opcode >> 4 & 0x01) << 0);
|
||||
pdst[1] = ((opcode >> 3 & 0x01) << 6) | ((opcode >> 2 & 0x01) << 4) | ((opcode >> 1 & 0x01) << 2) | ((opcode >> 0 & 0x01) << 0);
|
||||
pdst[2] = (uint8_t)((addr >> 8) & 0xFF);
|
||||
pdst[3] = (uint8_t)((addr >> 0) & 0xFF);
|
||||
|
||||
pdst[4] = 0;
|
||||
|
||||
return 4 + 1;
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
pdst[0] = ((opcode >> 7 & 0x01) << 4) | ((opcode >> 6 & 0x01) << 0);
|
||||
pdst[1] = ((opcode >> 5 & 0x01) << 4) | ((opcode >> 4 & 0x01) << 0);
|
||||
pdst[2] = ((opcode >> 3 & 0x01) << 4) | ((opcode >> 2 & 0x01) << 0);
|
||||
pdst[3] = ((opcode >> 1 & 0x01) << 4) | ((opcode >> 0 & 0x01) << 0);
|
||||
|
||||
pdst[4] = ((uint8_t)(addr >> 8) & 0xFF);
|
||||
pdst[5] = ((uint8_t)(addr >> 0) & 0xFF);
|
||||
|
||||
pdst[6] = 0;
|
||||
|
||||
return 6 + 1;
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
// Initialise our gpios
|
||||
static void pio_spi_gpio_setup(spi_pio_state_t *state) {
|
||||
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
// Setup DO and DI
|
||||
gpio_init(state->spi_config->data_io0_pin);
|
||||
gpio_init(state->spi_config->data_io1_pin);
|
||||
gpio_set_dir(state->spi_config->data_io0_pin, GPIO_OUT);
|
||||
gpio_set_dir(state->spi_config->data_io1_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->data_io0_pin, false);
|
||||
gpio_put(state->spi_config->data_io1_pin, false);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
// Setup DO and DI
|
||||
gpio_init(state->spi_config->data_io0_pin);
|
||||
gpio_init(state->spi_config->data_io1_pin);
|
||||
gpio_set_dir(state->spi_config->data_io0_pin, GPIO_OUT);
|
||||
gpio_set_dir(state->spi_config->data_io1_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->data_io0_pin, false);
|
||||
gpio_put(state->spi_config->data_io1_pin, false);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
// Setup DO and DI
|
||||
gpio_init(state->spi_config->data_io0_pin);
|
||||
gpio_init(state->spi_config->data_io1_pin);
|
||||
gpio_init(state->spi_config->data_io2_pin);
|
||||
gpio_init(state->spi_config->data_io3_pin);
|
||||
gpio_set_dir(state->spi_config->data_io0_pin, GPIO_OUT);
|
||||
gpio_set_dir(state->spi_config->data_io1_pin, GPIO_OUT);
|
||||
gpio_set_dir(state->spi_config->data_io2_pin, GPIO_OUT);
|
||||
gpio_set_dir(state->spi_config->data_io3_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->data_io0_pin, false);
|
||||
gpio_put(state->spi_config->data_io1_pin, false);
|
||||
gpio_put(state->spi_config->data_io2_pin, false);
|
||||
gpio_put(state->spi_config->data_io3_pin, false);
|
||||
#endif
|
||||
|
||||
// Setup CS
|
||||
gpio_init(state->spi_config->cs_pin);
|
||||
gpio_set_dir(state->spi_config->cs_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->cs_pin, true);
|
||||
|
||||
// Setup reset
|
||||
gpio_init(state->spi_config->irq_pin);
|
||||
gpio_set_dir(state->spi_config->irq_pin, GPIO_IN);
|
||||
gpio_set_pulls(state->spi_config->irq_pin, false, false);
|
||||
#else //W55RP20
|
||||
// Setup MOSI, MISO and IRQ
|
||||
gpio_init(state->spi_config->data_out_pin);
|
||||
gpio_set_dir(state->spi_config->data_out_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->data_out_pin, false);
|
||||
|
||||
// Setup CS
|
||||
gpio_init(state->spi_config->cs_pin);
|
||||
gpio_set_dir(state->spi_config->cs_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->cs_pin, true);
|
||||
|
||||
// Setup IRQ
|
||||
gpio_init(state->spi_config->irq_pin);
|
||||
gpio_set_dir(state->spi_config->irq_pin, GPIO_IN);
|
||||
gpio_set_pulls(state->spi_config->irq_pin, false, false);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
wiznet_spi_handle_t wiznet_spi_pio_open(const wiznet_spi_config_t *spi_config) {
|
||||
|
||||
spi_pio_state_t *state;
|
||||
for (int i = 0; i < count_of(spi_pio_state); i++) {
|
||||
if (!spi_pio_state[i].funcs) {
|
||||
state = &spi_pio_state[i];
|
||||
break;
|
||||
}
|
||||
}
|
||||
assert(state);
|
||||
if (!state) {
|
||||
return NULL;
|
||||
}
|
||||
state->spi_config = spi_config;
|
||||
state->funcs = get_wiznet_spi_pio_impl();
|
||||
|
||||
pio_spi_gpio_setup(state);
|
||||
|
||||
pio_hw_t *pios[2] = {pio0, pio1};
|
||||
uint pio_index = PIO_SPI_PREFERRED_PIO;
|
||||
|
||||
if (!pio_can_add_program(pios[pio_index], &PIO_PROGRAM_FUNC)) {
|
||||
pio_index ^= 1;
|
||||
if (!pio_can_add_program(pios[pio_index], &PIO_PROGRAM_FUNC)) {
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
state->pio = pios[pio_index];
|
||||
state->dma_in = -1;
|
||||
state->dma_out = -1;
|
||||
|
||||
static_assert(GPIO_FUNC_PIO1 == GPIO_FUNC_PIO0 + 1, "");
|
||||
state->pio_func_sel = GPIO_FUNC_PIO0 + pio_index;
|
||||
state->pio_sm = (int8_t)pio_claim_unused_sm(state->pio, false);
|
||||
if (state->pio_sm < 0) {
|
||||
wiznet_spi_pio_close(&state->funcs);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
state->pio_offset = pio_add_program(state->pio, &PIO_PROGRAM_FUNC);
|
||||
|
||||
uint64_t f_sys = clock_get_hz(clk_sys); // Hz
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
const char *wizchip_pio_clock_str = "PIO QSPI CLOCK SPEED";
|
||||
#else
|
||||
const char *wizchip_pio_clock_str = "PIO SPI CLOCK SPEED";
|
||||
#endif
|
||||
|
||||
printf("[%s : %.2f MHz] (sys=%.2f MHz)\r\n\r\n",
|
||||
wizchip_pio_clock_str,
|
||||
(double)f_sys / (2.0 * (state->spi_config->clock_div_major +
|
||||
state->spi_config->clock_div_minor / 256.0)) / 1e6,
|
||||
f_sys / 1e6);
|
||||
|
||||
pio_sm_config sm_config = PIO_PROGRAM_GET_DEFAULT_CONFIG_FUNC(state->pio_offset);
|
||||
|
||||
sm_config_set_clkdiv_int_frac(&sm_config, state->spi_config->clock_div_major, state->spi_config->clock_div_minor);
|
||||
hw_write_masked(&pads_bank0_hw->io[state->spi_config->clock_pin],
|
||||
(uint)PADS_DRIVE_STRENGTH << PADS_BANK0_GPIO0_DRIVE_LSB,
|
||||
PADS_BANK0_GPIO0_DRIVE_BITS
|
||||
);
|
||||
hw_write_masked(&pads_bank0_hw->io[state->spi_config->clock_pin],
|
||||
(uint)1 << PADS_BANK0_GPIO0_SLEWFAST_LSB,
|
||||
PADS_BANK0_GPIO0_SLEWFAST_BITS
|
||||
);
|
||||
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
printf("\r\n[QSPI SINGLE MODE]\r\n");
|
||||
sm_config_set_out_pins(&sm_config, state->spi_config->data_io0_pin, 1);
|
||||
sm_config_set_in_pins(&sm_config, state->spi_config->data_io1_pin);
|
||||
sm_config_set_set_pins(&sm_config, state->spi_config->data_io0_pin, 2);
|
||||
sm_config_set_sideset(&sm_config, 1, false, false);
|
||||
sm_config_set_sideset_pins(&sm_config, state->spi_config->clock_pin);
|
||||
|
||||
sm_config_set_in_shift(&sm_config, false, true, 8);
|
||||
sm_config_set_out_shift(&sm_config, false, true, 8);
|
||||
|
||||
hw_set_bits(&state->pio->input_sync_bypass,
|
||||
(1u << state->spi_config->data_io0_pin) | (1u << state->spi_config->data_io1_pin));
|
||||
pio_sm_set_config(state->pio, state->pio_sm, &sm_config);
|
||||
pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->spi_config->clock_pin, 1, true);
|
||||
|
||||
gpio_set_function(state->spi_config->data_io0_pin, state->pio_func_sel);
|
||||
|
||||
// Set data pin to pull down and schmitt
|
||||
gpio_set_pulls(state->spi_config->data_io0_pin, false, true);
|
||||
gpio_set_pulls(state->spi_config->data_io1_pin, false, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io0_pin, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io1_pin, true);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
printf("[QSPI DUAL MODE]\r\n\r\n");
|
||||
sm_config_set_out_pins(&sm_config, state->spi_config->data_io0_pin, 2);
|
||||
sm_config_set_in_pins(&sm_config, state->spi_config->data_io0_pin);
|
||||
sm_config_set_set_pins(&sm_config, state->spi_config->data_io0_pin, 2);
|
||||
sm_config_set_sideset(&sm_config, 1, false, false);
|
||||
sm_config_set_sideset_pins(&sm_config, state->spi_config->clock_pin);
|
||||
|
||||
sm_config_set_in_shift(&sm_config, false, true, 8);
|
||||
sm_config_set_out_shift(&sm_config, false, true, 8);
|
||||
|
||||
hw_set_bits(&state->pio->input_sync_bypass,
|
||||
(1u << state->spi_config->data_io0_pin) | (1u << state->spi_config->data_io1_pin));
|
||||
pio_sm_set_config(state->pio, state->pio_sm, &sm_config);
|
||||
pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->spi_config->clock_pin, 1, true);
|
||||
|
||||
gpio_set_function(state->spi_config->data_io0_pin, state->pio_func_sel);
|
||||
gpio_set_function(state->spi_config->data_io1_pin, state->pio_func_sel);
|
||||
|
||||
// Set data pin to pull down and schmitt
|
||||
gpio_set_pulls(state->spi_config->data_io0_pin, false, true);
|
||||
gpio_set_pulls(state->spi_config->data_io1_pin, false, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io0_pin, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io1_pin, true);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
printf("\r\n[QSPI QUAD MODE]\r\n");
|
||||
sm_config_set_out_pins(&sm_config, state->spi_config->data_io0_pin, 4);
|
||||
sm_config_set_in_pins(&sm_config, state->spi_config->data_io0_pin);
|
||||
sm_config_set_set_pins(&sm_config, state->spi_config->data_io0_pin, 4);
|
||||
sm_config_set_sideset(&sm_config, 1, false, false);
|
||||
sm_config_set_sideset_pins(&sm_config, state->spi_config->clock_pin);
|
||||
|
||||
sm_config_set_in_shift(&sm_config, false, true, 8);
|
||||
sm_config_set_out_shift(&sm_config, false, true, 8);
|
||||
|
||||
hw_set_bits(&state->pio->input_sync_bypass,
|
||||
(1u << state->spi_config->data_io0_pin) | (1u << state->spi_config->data_io1_pin) | (1u << state->spi_config->data_io2_pin) | (1u << state->spi_config->data_io3_pin));
|
||||
pio_sm_set_config(state->pio, state->pio_sm, &sm_config);
|
||||
pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->spi_config->clock_pin, 1, true);
|
||||
|
||||
gpio_set_function(state->spi_config->data_io0_pin, state->pio_func_sel);
|
||||
gpio_set_function(state->spi_config->data_io1_pin, state->pio_func_sel);
|
||||
gpio_set_function(state->spi_config->data_io2_pin, state->pio_func_sel);
|
||||
gpio_set_function(state->spi_config->data_io3_pin, state->pio_func_sel);
|
||||
|
||||
// Set data pin to pull down and schmitt
|
||||
gpio_set_pulls(state->spi_config->data_io0_pin, false, true);
|
||||
gpio_set_pulls(state->spi_config->data_io1_pin, false, true);
|
||||
gpio_set_pulls(state->spi_config->data_io2_pin, false, true);
|
||||
gpio_set_pulls(state->spi_config->data_io3_pin, false, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io0_pin, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io1_pin, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io2_pin, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_io3_pin, true);
|
||||
/* @todo: Implement to use. */
|
||||
#endif
|
||||
#else //W55RP20
|
||||
sm_config_set_out_pins(&sm_config, state->spi_config->data_out_pin, 1);
|
||||
sm_config_set_in_pins(&sm_config, state->spi_config->data_in_pin);
|
||||
sm_config_set_set_pins(&sm_config, state->spi_config->data_out_pin, 1);
|
||||
sm_config_set_sideset(&sm_config, 1, false, false);
|
||||
sm_config_set_sideset_pins(&sm_config, state->spi_config->clock_pin);
|
||||
|
||||
sm_config_set_in_shift(&sm_config, false, true, 8);
|
||||
sm_config_set_out_shift(&sm_config, false, true, 8);
|
||||
hw_set_bits(&state->pio->input_sync_bypass, 1u << state->spi_config->data_in_pin);
|
||||
pio_sm_set_config(state->pio, state->pio_sm, &sm_config);
|
||||
pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->spi_config->clock_pin, 1, true);
|
||||
gpio_set_function(state->spi_config->data_out_pin, state->pio_func_sel);
|
||||
gpio_set_function(state->spi_config->clock_pin, state->pio_func_sel);
|
||||
|
||||
// Set data pin to pull down and schmitt
|
||||
gpio_set_pulls(state->spi_config->data_in_pin, false, true);
|
||||
gpio_set_input_hysteresis_enabled(state->spi_config->data_in_pin, true);
|
||||
#endif
|
||||
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_set(pio_pins, 1));
|
||||
|
||||
state->dma_out = (int8_t)dma_claim_unused_channel(false); // todo: Should be able to use one dma channel?
|
||||
state->dma_in = (int8_t)dma_claim_unused_channel(false);
|
||||
if (state->dma_out < 0 || state->dma_in < 0) {
|
||||
wiznet_spi_pio_close(&state->funcs);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return &state->funcs;
|
||||
|
||||
}
|
||||
|
||||
static void wiznet_spi_pio_close(wiznet_spi_handle_t handle) {
|
||||
|
||||
spi_pio_state_t *state = (spi_pio_state_t *)handle;
|
||||
if (state) {
|
||||
if (state->pio_sm >= 0) {
|
||||
if (state->pio_offset != -1) {
|
||||
pio_remove_program(state->pio, &PIO_PROGRAM_FUNC, state->pio_offset);
|
||||
}
|
||||
|
||||
pio_sm_unclaim(state->pio, state->pio_sm);
|
||||
}
|
||||
if (state->dma_out >= 0) {
|
||||
dma_channel_unclaim(state->dma_out);
|
||||
state->dma_out = -1;
|
||||
}
|
||||
if (state->dma_in >= 0) {
|
||||
dma_channel_unclaim(state->dma_in);
|
||||
state->dma_in = -1;
|
||||
}
|
||||
state->funcs = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static void cs_set(spi_pio_state_t *state, bool value) {
|
||||
gpio_put(state->spi_config->cs_pin, value);
|
||||
}
|
||||
|
||||
static __noinline void ns_delay(uint32_t ns) {
|
||||
// cycles = ns * clk_sys_hz / 1,000,000,000
|
||||
uint32_t cycles = ns * (clock_get_hz(clk_sys) >> 16u) / (1000000000u >> 16u);
|
||||
busy_wait_at_least_cycles(cycles);
|
||||
}
|
||||
|
||||
static void wiznet_spi_pio_frame_start(void) {
|
||||
assert(active_state);
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
gpio_set_function(active_state->spi_config->data_io0_pin, active_state->pio_func_sel);
|
||||
gpio_set_function(active_state->spi_config->data_io1_pin, active_state->pio_func_sel);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
gpio_set_function(active_state->spi_config->data_io0_pin, active_state->pio_func_sel);
|
||||
gpio_set_function(active_state->spi_config->data_io1_pin, active_state->pio_func_sel);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
gpio_set_function(active_state->spi_config->data_io0_pin, active_state->pio_func_sel);
|
||||
gpio_set_function(active_state->spi_config->data_io1_pin, active_state->pio_func_sel);
|
||||
gpio_set_function(active_state->spi_config->data_io2_pin, active_state->pio_func_sel);
|
||||
gpio_set_function(active_state->spi_config->data_io3_pin, active_state->pio_func_sel);
|
||||
/* @todo: Implement to use. */
|
||||
#endif
|
||||
gpio_set_function(active_state->spi_config->clock_pin, active_state->pio_func_sel);
|
||||
gpio_pull_down(active_state->spi_config->clock_pin);
|
||||
#else
|
||||
gpio_set_function(active_state->spi_config->data_out_pin, active_state->pio_func_sel);
|
||||
gpio_set_function(active_state->spi_config->clock_pin, active_state->pio_func_sel);
|
||||
gpio_pull_down(active_state->spi_config->clock_pin);
|
||||
#endif
|
||||
// Pull CS low
|
||||
cs_set(active_state, false);
|
||||
}
|
||||
|
||||
static void wiznet_spi_pio_frame_end(void) {
|
||||
assert(active_state);
|
||||
// from this point a positive edge will cause an IRQ to be pending
|
||||
cs_set(active_state, true);
|
||||
// we need to wait a bit in case the irq line is incorrectly high
|
||||
#ifdef IRQ_SAMPLE_DELAY_NS
|
||||
ns_delay(IRQ_SAMPLE_DELAY_NS);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
// To read a byte we must first have been asked to write a 3 byte spi header
|
||||
void wiznet_spi_pio_read_byte(uint8_t op_code, uint16_t AddrSel, uint8_t *rx, uint16_t rx_length) {
|
||||
uint8_t command_buf[8] = {0,};
|
||||
uint16_t command_len = mk_cmd_buf(command_buf, op_code, AddrSel);
|
||||
uint32_t loop_cnt = 0;
|
||||
|
||||
pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
|
||||
pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset, active_state->pio_offset + PIO_OFFSET_READ_BITS_END - 1);
|
||||
//pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset + PIO_SPI_OFFSET_WRITE_BITS, active_state->pio_offset + PIO_SPI_OFFSET_READ_BITS_END - 1);
|
||||
pio_sm_clear_fifos(active_state->pio, active_state->pio_sm);
|
||||
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
loop_cnt = 8;
|
||||
pio_sm_set_pindirs_with_mask(active_state->pio,
|
||||
active_state->pio_sm,
|
||||
(1u << active_state->spi_config->data_io0_pin), (1u << active_state->spi_config->data_io0_pin));// | (1u << active_state->spi_config->data_io1_pin));
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
loop_cnt = 4;
|
||||
pio_sm_set_pindirs_with_mask(active_state->pio,
|
||||
active_state->pio_sm,
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin),
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin));
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
loop_cnt = 2;
|
||||
pio_sm_set_pindirs_with_mask(active_state->pio,
|
||||
active_state->pio_sm,
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin) | (1u << active_state->spi_config->data_io2_pin) | (1u << active_state->spi_config->data_io3_pin),
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin) | (1u << active_state->spi_config->data_io2_pin) | (1u << active_state->spi_config->data_io3_pin));
|
||||
|
||||
/* @todo: Implement to use. */
|
||||
#endif
|
||||
|
||||
pio_sm_restart(active_state->pio, active_state->pio_sm);
|
||||
pio_sm_clkdiv_restart(active_state->pio, active_state->pio_sm);
|
||||
|
||||
pio_sm_put(active_state->pio, active_state->pio_sm, command_len * loop_cnt - 1);
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_x, 32));
|
||||
|
||||
pio_sm_put(active_state->pio, active_state->pio_sm, rx_length - 1);
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_y, 32));
|
||||
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_jmp(active_state->pio_offset));
|
||||
|
||||
dma_channel_abort(active_state->dma_out);
|
||||
dma_channel_abort(active_state->dma_in);
|
||||
|
||||
dma_channel_config out_config = dma_channel_get_default_config(active_state->dma_out);
|
||||
channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
|
||||
channel_config_set_bswap(&out_config, true);
|
||||
channel_config_set_dreq(&out_config, pio_get_dreq(active_state->pio, active_state->pio_sm, true));
|
||||
dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], command_buf, command_len, true);
|
||||
|
||||
dma_channel_config in_config = dma_channel_get_default_config(active_state->dma_in);
|
||||
channel_config_set_transfer_data_size(&in_config, DMA_SIZE_8);
|
||||
channel_config_set_bswap(&in_config, true);
|
||||
channel_config_set_dreq(&in_config, pio_get_dreq(active_state->pio, active_state->pio_sm, false));
|
||||
channel_config_set_write_increment(&in_config, true);
|
||||
channel_config_set_read_increment(&in_config, false);
|
||||
dma_channel_configure(active_state->dma_in, &in_config, rx, &active_state->pio->rxf[active_state->pio_sm], rx_length, true);
|
||||
|
||||
#if 1
|
||||
pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
|
||||
|
||||
__compiler_memory_barrier();
|
||||
|
||||
dma_channel_wait_for_finish_blocking(active_state->dma_out);
|
||||
dma_channel_wait_for_finish_blocking(active_state->dma_in);
|
||||
|
||||
__compiler_memory_barrier();
|
||||
|
||||
pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_mov(pio_pins, pio_null));
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
void wiznet_spi_pio_write_byte(uint8_t op_code, uint16_t AddrSel, uint8_t *tx, uint16_t tx_length) {
|
||||
uint8_t command_buf[8] = {0,};
|
||||
uint16_t command_len = mk_cmd_buf(command_buf, op_code, AddrSel);
|
||||
uint32_t loop_cnt = 0;
|
||||
tx_length = tx_length + command_len;
|
||||
|
||||
pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
|
||||
pio_sm_set_wrap(active_state->pio, active_state->pio_sm, active_state->pio_offset, active_state->pio_offset + PIO_OFFSET_WRITE_BITS_END - 1);
|
||||
pio_sm_clear_fifos(active_state->pio, active_state->pio_sm);
|
||||
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
loop_cnt = 8;
|
||||
pio_sm_set_pindirs_with_mask(active_state->pio,
|
||||
active_state->pio_sm,
|
||||
(1u << active_state->spi_config->data_io0_pin), (1u << active_state->spi_config->data_io0_pin));
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
loop_cnt = 4;
|
||||
pio_sm_set_pindirs_with_mask(active_state->pio,
|
||||
active_state->pio_sm,
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin),
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin));
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
loop_cnt = 2;
|
||||
pio_sm_set_pindirs_with_mask(active_state->pio,
|
||||
active_state->pio_sm,
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin) | (1u << active_state->spi_config->data_io2_pin) | (1u << active_state->spi_config->data_io3_pin),
|
||||
(1u << active_state->spi_config->data_io0_pin) | (1u << active_state->spi_config->data_io1_pin) | (1u << active_state->spi_config->data_io2_pin) | (1u << active_state->spi_config->data_io3_pin));
|
||||
|
||||
#endif
|
||||
|
||||
pio_sm_restart(active_state->pio, active_state->pio_sm);
|
||||
pio_sm_clkdiv_restart(active_state->pio, active_state->pio_sm);
|
||||
pio_sm_put(active_state->pio, active_state->pio_sm, tx_length * loop_cnt - 1);
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_x, 32));
|
||||
pio_sm_put(active_state->pio, active_state->pio_sm, 0);
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_out(pio_y, 32));
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_jmp(active_state->pio_offset));
|
||||
dma_channel_abort(active_state->dma_out);
|
||||
|
||||
|
||||
dma_channel_config out_config = dma_channel_get_default_config(active_state->dma_out);
|
||||
channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
|
||||
channel_config_set_bswap(&out_config, true);
|
||||
channel_config_set_dreq(&out_config, pio_get_dreq(active_state->pio, active_state->pio_sm, true));
|
||||
|
||||
pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
|
||||
|
||||
dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], command_buf, command_len, true);
|
||||
dma_channel_wait_for_finish_blocking(active_state->dma_out);
|
||||
dma_channel_configure(active_state->dma_out, &out_config, &active_state->pio->txf[active_state->pio_sm], tx, tx_length - command_len, true);
|
||||
dma_channel_wait_for_finish_blocking(active_state->dma_out);
|
||||
|
||||
const uint32_t fdebug_tx_stall = 1u << (PIO_FDEBUG_TXSTALL_LSB + active_state->pio_sm);
|
||||
active_state->pio->fdebug = fdebug_tx_stall;
|
||||
// pio_sm_set_enabled(active_state->pio, active_state->pio_sm, true);
|
||||
while (!(active_state->pio->fdebug & fdebug_tx_stall)) {
|
||||
tight_loop_contents(); // todo timeout
|
||||
}
|
||||
#if 1
|
||||
|
||||
__compiler_memory_barrier();
|
||||
//pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
|
||||
#if (_WIZCHIP_QSPI_MODE_ == QSPI_SINGLE_MODE)
|
||||
pio_sm_set_consecutive_pindirs(active_state->pio, active_state->pio_sm, active_state->spi_config->data_io0_pin, 1, false);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_DUAL_MODE)
|
||||
pio_sm_set_consecutive_pindirs(active_state->pio, active_state->pio_sm, active_state->spi_config->data_io0_pin, 2, false);
|
||||
#elif (_WIZCHIP_QSPI_MODE_ == QSPI_QUAD_MODE)
|
||||
pio_sm_set_consecutive_pindirs(active_state->pio, active_state->pio_sm, active_state->spi_config->data_io0_pin, 4, false);
|
||||
#endif
|
||||
|
||||
pio_sm_exec(active_state->pio, active_state->pio_sm, pio_encode_mov(pio_pins, pio_null));
|
||||
pio_sm_set_enabled(active_state->pio, active_state->pio_sm, false);
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
// send tx then receive rx
|
||||
// rx can be null if you just want to send, but tx and tx_length must be valid
|
||||
static bool pio_spi_transfer(spi_pio_state_t *state, const uint8_t *tx, size_t tx_length, uint8_t *rx, size_t rx_length) {
|
||||
assert(state);
|
||||
if (!state || (tx == NULL)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (rx != NULL && tx != NULL) {
|
||||
assert(tx && tx_length && rx_length);
|
||||
|
||||
pio_sm_set_enabled(state->pio, state->pio_sm, false); // disable sm
|
||||
pio_sm_set_wrap(state->pio, state->pio_sm, state->pio_offset + PIO_OFFSET_WRITE_BITS, state->pio_offset + PIO_OFFSET_READ_BITS_END - 1);
|
||||
pio_sm_clear_fifos(state->pio, state->pio_sm); // clear fifos from previous run
|
||||
pio_sm_set_pindirs_with_mask(state->pio, state->pio_sm, 1u << state->spi_config->data_out_pin, 1u << state->spi_config->data_out_pin);
|
||||
pio_sm_restart(state->pio, state->pio_sm);
|
||||
pio_sm_clkdiv_restart(state->pio, state->pio_sm);
|
||||
pio_sm_put(state->pio, state->pio_sm, tx_length * 8 - 1); // set x
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_out(pio_x, 32));
|
||||
pio_sm_put(state->pio, state->pio_sm, rx_length - 1); // set y
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_out(pio_y, 32));
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_jmp(state->pio_offset)); // setup pc
|
||||
dma_channel_abort(state->dma_out);
|
||||
dma_channel_abort(state->dma_in);
|
||||
|
||||
dma_channel_config out_config = dma_channel_get_default_config(state->dma_out);
|
||||
channel_config_set_dreq(&out_config, pio_get_dreq(state->pio, state->pio_sm, true));
|
||||
channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
|
||||
dma_channel_configure(state->dma_out, &out_config, &state->pio->txf[state->pio_sm], tx, tx_length, true);
|
||||
|
||||
dma_channel_config in_config = dma_channel_get_default_config(state->dma_in);
|
||||
channel_config_set_dreq(&in_config, pio_get_dreq(state->pio, state->pio_sm, false));
|
||||
channel_config_set_write_increment(&in_config, true);
|
||||
channel_config_set_read_increment(&in_config, false);
|
||||
channel_config_set_transfer_data_size(&in_config, DMA_SIZE_8);
|
||||
dma_channel_configure(state->dma_in, &in_config, rx, &state->pio->rxf[state->pio_sm], rx_length, true);
|
||||
|
||||
pio_sm_set_enabled(state->pio, state->pio_sm, true);
|
||||
__compiler_memory_barrier();
|
||||
|
||||
dma_channel_wait_for_finish_blocking(state->dma_out);
|
||||
dma_channel_wait_for_finish_blocking(state->dma_in);
|
||||
|
||||
__compiler_memory_barrier();
|
||||
} else if (tx != NULL) {
|
||||
assert(tx_length);
|
||||
|
||||
pio_sm_set_enabled(state->pio, state->pio_sm, false);
|
||||
pio_sm_set_wrap(state->pio, state->pio_sm, state->pio_offset + PIO_OFFSET_WRITE_BITS, state->pio_offset + PIO_OFFSET_WRITE_BITS_END - 1);
|
||||
pio_sm_clear_fifos(state->pio, state->pio_sm);
|
||||
pio_sm_restart(state->pio, state->pio_sm);
|
||||
pio_sm_clkdiv_restart(state->pio, state->pio_sm);
|
||||
pio_sm_put(state->pio, state->pio_sm, tx_length * 8 - 1);
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_out(pio_x, 32));
|
||||
pio_sm_put(state->pio, state->pio_sm, tx_length - 1);
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_out(pio_y, 32));
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_set(pio_pins, 0));
|
||||
pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->spi_config->data_out_pin, 1, true);
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_jmp(state->pio_offset + PIO_OFFSET_WRITE_BITS));
|
||||
dma_channel_abort(state->dma_out);
|
||||
|
||||
dma_channel_config out_config = dma_channel_get_default_config(state->dma_out);
|
||||
channel_config_set_dreq(&out_config, pio_get_dreq(state->pio, state->pio_sm, true));
|
||||
|
||||
channel_config_set_transfer_data_size(&out_config, DMA_SIZE_8);
|
||||
dma_channel_configure(state->dma_out, &out_config, &state->pio->txf[state->pio_sm], tx, tx_length, true);
|
||||
|
||||
const uint32_t fDebugTxStall = 1u << (PIO_FDEBUG_TXSTALL_LSB + state->pio_sm);
|
||||
state->pio->fdebug = fDebugTxStall;
|
||||
pio_sm_set_enabled(state->pio, state->pio_sm, true);
|
||||
while (!(state->pio->fdebug & fDebugTxStall)) {
|
||||
tight_loop_contents(); // todo timeout
|
||||
}
|
||||
__compiler_memory_barrier();
|
||||
pio_sm_set_enabled(state->pio, state->pio_sm, false);
|
||||
pio_sm_set_consecutive_pindirs(state->pio, state->pio_sm, state->spi_config->data_in_pin, 1, false);
|
||||
} else if (rx != NULL) {
|
||||
panic_unsupported(); // shouldn't be used
|
||||
}
|
||||
pio_sm_exec(state->pio, state->pio_sm, pio_encode_mov(pio_pins, pio_null)); // for next time we turn output on
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
static uint8_t wiznet_spi_pio_read_byte(void) {
|
||||
assert(active_state);
|
||||
assert(active_state->spi_header_count == SPI_HEADER_LEN);
|
||||
uint8_t ret;
|
||||
if (!pio_spi_transfer(active_state, active_state->spi_header, active_state->spi_header_count, &ret, 1)) {
|
||||
panic("spi failed read");
|
||||
}
|
||||
active_state->spi_header_count = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
// This is not used when the burst functions are provided
|
||||
static void wiznet_spi_pio_write_byte(uint8_t wb) {
|
||||
panic_unsupported(); // shouldn't be used
|
||||
}
|
||||
|
||||
// To read a buffer we must first have been asked to write a 3 byte spi header
|
||||
static void wiznet_spi_pio_read_buffer(uint8_t* pBuf, uint16_t len) {
|
||||
|
||||
assert(active_state);
|
||||
assert(active_state->spi_header_count == SPI_HEADER_LEN);
|
||||
if (!pio_spi_transfer(active_state, active_state->spi_header, active_state->spi_header_count, pBuf, len)) {
|
||||
panic("spi failed reading buffer");
|
||||
}
|
||||
active_state->spi_header_count = 0;
|
||||
}
|
||||
|
||||
// If we have been asked to write a spi header already, then write it and the rest of the buffer
|
||||
// or else if we've been given enough data for just the spi header, save it until the next call
|
||||
// or we're writing a byte in which case we're given a buffer including the spi header
|
||||
static void wiznet_spi_pio_write_buffer(uint8_t* pBuf, uint16_t len) {
|
||||
assert(active_state);
|
||||
if (len == SPI_HEADER_LEN && active_state->spi_header_count == 0) {
|
||||
memcpy(active_state->spi_header, pBuf, SPI_HEADER_LEN); // expect another call
|
||||
active_state->spi_header_count = SPI_HEADER_LEN;
|
||||
} else {
|
||||
if (active_state->spi_header_count == SPI_HEADER_LEN) {
|
||||
if (!pio_spi_transfer(active_state, active_state->spi_header, SPI_HEADER_LEN, NULL, 0)) {
|
||||
panic("spi failed writing header");
|
||||
}
|
||||
active_state->spi_header_count = 0;
|
||||
}
|
||||
assert(active_state->spi_header_count == 0);
|
||||
if (!pio_spi_transfer(active_state, pBuf, len, NULL, 0)) {
|
||||
panic("spi failed writing buffer");
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static void wiznet_spi_pio_set_active(wiznet_spi_handle_t handle) {
|
||||
active_state = (spi_pio_state_t *)handle;
|
||||
}
|
||||
|
||||
static void wiznet_spi_pio_set_inactive(void) {
|
||||
active_state = NULL;
|
||||
}
|
||||
|
||||
static void wizchip_spi_pio_reset(wiznet_spi_handle_t handle) {
|
||||
|
||||
spi_pio_state_t *state = (spi_pio_state_t *)handle;
|
||||
gpio_set_dir(state->spi_config->reset_pin, GPIO_OUT);
|
||||
gpio_put(state->spi_config->reset_pin, 0);
|
||||
sleep_ms(100);
|
||||
gpio_put(state->spi_config->reset_pin, 1);
|
||||
sleep_ms(100);
|
||||
|
||||
}
|
||||
|
||||
static wiznet_spi_funcs_t *get_wiznet_spi_pio_impl(void) {
|
||||
static wiznet_spi_funcs_t funcs = {
|
||||
.close = wiznet_spi_pio_close,
|
||||
.set_active = wiznet_spi_pio_set_active,
|
||||
.set_inactive = wiznet_spi_pio_set_inactive,
|
||||
.frame_start = wiznet_spi_pio_frame_start,
|
||||
.frame_end = wiznet_spi_pio_frame_end,
|
||||
.read_byte = wiznet_spi_pio_read_byte,
|
||||
.write_byte = wiznet_spi_pio_write_byte,
|
||||
#if (_WIZCHIP_ == W5500)
|
||||
.read_buffer = wiznet_spi_pio_read_buffer,
|
||||
.write_buffer = wiznet_spi_pio_write_buffer,
|
||||
#endif
|
||||
.reset = wizchip_spi_pio_reset,
|
||||
};
|
||||
return &funcs;
|
||||
}
|
||||
@@ -0,0 +1,77 @@
|
||||
/*
|
||||
Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
|
||||
|
||||
SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _WIZNET_SPI_FUNCS_H_
|
||||
#define _WIZNET_SPI_FUNCS_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef struct wiznet_spi_funcs** wiznet_spi_handle_t;
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
typedef struct wiznet_spi_config {
|
||||
uint16_t clock_div_major;
|
||||
uint8_t clock_div_minor;
|
||||
uint8_t clock_pin;
|
||||
uint8_t data_io0_pin;
|
||||
uint8_t data_io1_pin;
|
||||
uint8_t data_io2_pin;
|
||||
uint8_t data_io3_pin;
|
||||
uint8_t cs_pin;
|
||||
uint8_t reset_pin;
|
||||
uint8_t irq_pin;
|
||||
} wiznet_spi_config_t;
|
||||
|
||||
typedef struct wiznet_spi_funcs {
|
||||
void (*close)(wiznet_spi_handle_t funcs);
|
||||
void (*set_active)(wiznet_spi_handle_t funcs);
|
||||
void (*set_inactive)(void);
|
||||
void (*frame_start)(void);
|
||||
void (*frame_end)(void);
|
||||
void (*read_byte)(uint8_t opcode, uint16_t addr, uint8_t* pBuf, uint16_t len);
|
||||
void (*write_byte)(uint8_t opcode, uint16_t addr, uint8_t* pBuf, uint16_t len);
|
||||
void (*read_buffer)(uint8_t *pBuf, uint16_t len);
|
||||
void (*write_buffer)(uint8_t *pBuf, uint16_t len);
|
||||
void (*reset)(wiznet_spi_handle_t funcs);
|
||||
} wiznet_spi_funcs_t;
|
||||
#else
|
||||
typedef struct wiznet_spi_config {
|
||||
uint8_t data_in_pin;
|
||||
uint8_t data_out_pin;
|
||||
uint8_t cs_pin;
|
||||
uint8_t clock_pin;
|
||||
uint8_t irq_pin;
|
||||
uint8_t reset_pin;
|
||||
uint16_t clock_div_major;
|
||||
uint8_t clock_div_minor;
|
||||
uint8_t spi_hw_instance;
|
||||
} wiznet_spi_config_t;
|
||||
|
||||
typedef struct wiznet_spi_funcs {
|
||||
void (*close)(wiznet_spi_handle_t funcs);
|
||||
void (*set_active)(wiznet_spi_handle_t funcs);
|
||||
void (*set_inactive)(void);
|
||||
void (*frame_start)(void);
|
||||
void (*frame_end)(void);
|
||||
uint8_t (*read_byte)(void);
|
||||
void (*write_byte)(uint8_t tx_data);
|
||||
void (*read_buffer)(uint8_t *pBuf, uint16_t len);
|
||||
void (*write_buffer)(uint8_t *pBuf, uint16_t len);
|
||||
void (*reset)(wiznet_spi_handle_t funcs);
|
||||
} wiznet_spi_funcs_t;
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#ifndef _WIZNET_SPI_PIO_H_
|
||||
#define _WIZNET_SPI_PIO_H_
|
||||
|
||||
#include "wizchip_spi.h"
|
||||
|
||||
|
||||
wiznet_spi_handle_t wiznet_spi_pio_open(const wiznet_spi_config_t *spi_config);
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,95 @@
|
||||
;
|
||||
; Copyright (c) 2023 Raspberry Pi (Trading) Ltd.
|
||||
;
|
||||
; SPDX-License-Identifier: BSD-3-Clause
|
||||
;
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Normal SPI for W55RP20
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
.program wiznet_spi_write_read
|
||||
.side_set 1
|
||||
|
||||
public write_bits:
|
||||
out pins, 1 side 0
|
||||
jmp x-- write_bits side 1
|
||||
set pins 0 side 0
|
||||
public write_end:
|
||||
read_byte_delay:
|
||||
set pindirs 0 side 0
|
||||
read_byte:
|
||||
set x 6 side 1
|
||||
read_bits:
|
||||
in pins, 1 side 0
|
||||
jmp x-- read_bits side 1
|
||||
in pins, 1 side 0
|
||||
jmp y-- read_byte side 0
|
||||
public read_end:
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; QSPI Single for W6300
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
.program wizchip_pio_spi_single_write_read
|
||||
.side_set 1
|
||||
|
||||
public write_bits:
|
||||
out pins, 1 side 0
|
||||
jmp x-- write_bits side 1
|
||||
set pins 0 side 0
|
||||
public write_bits_end:
|
||||
read_byte_delay:
|
||||
set pindirs 0 side 0
|
||||
read_byte:
|
||||
set x 6 side 1
|
||||
read_bits:
|
||||
in pins, 1 side 0
|
||||
jmp x-- read_bits side 1
|
||||
in pins, 1 side 0
|
||||
jmp y-- read_byte side 0
|
||||
public read_bits_end:
|
||||
|
||||
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; QSPI Dual for W6300
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
.program wizchip_pio_spi_dual_write_read
|
||||
.side_set 1
|
||||
|
||||
public write_bits:
|
||||
out pins, 2 side 0
|
||||
jmp x-- write_bits side 1
|
||||
set pins 0 side 0
|
||||
public write_bits_end:
|
||||
read_byte_delay:
|
||||
set pindirs 0 side 0
|
||||
read_byte:
|
||||
set x 2 side 1
|
||||
read_bits:
|
||||
in pins, 2 side 0
|
||||
jmp x-- read_bits side 1
|
||||
in pins, 2 side 0
|
||||
jmp y-- read_byte side 0
|
||||
public read_bits_end:
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; QSPI Quad for W6300
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
.program wizchip_pio_spi_quad_write_read
|
||||
.side_set 1
|
||||
|
||||
write_bits:
|
||||
out pins, 4 side 0
|
||||
jmp x-- write_bits side 1
|
||||
set pins 0 side 0
|
||||
public write_bits_end:
|
||||
read_byte_delay:
|
||||
set pindirs 0 side 0
|
||||
read_byte:
|
||||
set x 0 side 1
|
||||
read_bits:
|
||||
in pins, 4 side 0
|
||||
jmp x-- read_bits side 1
|
||||
in pins, 4 side 0
|
||||
jmp y-- read_byte side 0
|
||||
public read_bits_end:
|
||||
@@ -0,0 +1,388 @@
|
||||
/**
|
||||
Copyright (c) 2022 WIZnet Co.,Ltd
|
||||
|
||||
SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Includes
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "port_common.h"
|
||||
|
||||
#include "wizchip_conf.h"
|
||||
#include "wizchip_spi.h"
|
||||
#include "board_list.h"
|
||||
|
||||
|
||||
#include "wizchip_qspi_pio.h"
|
||||
#include "pico/stdlib.h"
|
||||
#include "pico/binary_info.h"
|
||||
#include "pico/critical_section.h"
|
||||
#include "hardware/dma.h"
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Macros
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Variables
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
static critical_section_t g_wizchip_cri_sec;
|
||||
|
||||
#ifdef USE_SPI_DMA
|
||||
static uint dma_tx;
|
||||
static uint dma_rx;
|
||||
static dma_channel_config dma_channel_config_tx;
|
||||
static dma_channel_config dma_channel_config_rx;
|
||||
#endif
|
||||
|
||||
#ifdef USE_PIO
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
wiznet_spi_config_t g_spi_config = {
|
||||
.clock_div_major = WIZNET_SPI_CLKDIV_MAJOR_DEFAULT,
|
||||
.clock_div_minor = WIZNET_SPI_CLKDIV_MINOR_DEFAULT,
|
||||
.clock_pin = PIO_SPI_SCK_PIN,
|
||||
.data_io0_pin = PIO_SPI_DATA_IO0_PIN,
|
||||
.data_io1_pin = PIO_SPI_DATA_IO1_PIN,
|
||||
.data_io2_pin = PIO_SPI_DATA_IO2_PIN,
|
||||
.data_io3_pin = PIO_SPI_DATA_IO3_PIN,
|
||||
.cs_pin = PIN_CS,
|
||||
.reset_pin = PIN_RST,
|
||||
.irq_pin = PIN_INT,
|
||||
};
|
||||
#else
|
||||
wiznet_spi_config_t g_spi_config = {
|
||||
.data_in_pin = PIN_MISO,
|
||||
.data_out_pin = PIN_MOSI,
|
||||
.cs_pin = PIN_CS,
|
||||
.clock_pin = PIN_SCK,
|
||||
.irq_pin = PIN_INT,
|
||||
.reset_pin = PIN_RST,
|
||||
.clock_div_major = WIZNET_SPI_CLKDIV_MAJOR_DEFAULT,
|
||||
.clock_div_minor = WIZNET_SPI_CLKDIV_MINOR_DEFAULT,
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
wiznet_spi_handle_t spi_handle;
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Functions
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
static inline void wizchip_select(void) {
|
||||
gpio_put(PIN_CS, 0);
|
||||
}
|
||||
|
||||
static inline void wizchip_deselect(void) {
|
||||
gpio_put(PIN_CS, 1);
|
||||
|
||||
}
|
||||
|
||||
void wizchip_reset() {
|
||||
gpio_init(PIN_RST);
|
||||
|
||||
#if defined(USE_PIO) && (_WIZCHIP_ == W5500)
|
||||
gpio_pull_up(PIN_RST);
|
||||
gpio_set_dir(PIN_RST, GPIO_OUT);
|
||||
sleep_ms(5);
|
||||
#else
|
||||
gpio_set_dir(PIN_RST, GPIO_OUT);
|
||||
#endif
|
||||
gpio_put(PIN_RST, 0);
|
||||
sleep_ms(100);
|
||||
|
||||
gpio_put(PIN_RST, 1);
|
||||
sleep_ms(100);
|
||||
|
||||
bi_decl(bi_1pin_with_name(PIN_RST, "WIZCHIP RESET"));
|
||||
}
|
||||
|
||||
#ifndef USE_PIO
|
||||
static uint8_t wizchip_read(void) {
|
||||
uint8_t rx_data = 0;
|
||||
uint8_t tx_data = 0xFF;
|
||||
|
||||
spi_read_blocking(SPI_PORT, tx_data, &rx_data, 1);
|
||||
|
||||
return rx_data;
|
||||
}
|
||||
|
||||
static void wizchip_write(uint8_t tx_data) {
|
||||
spi_write_blocking(SPI_PORT, &tx_data, 1);
|
||||
}
|
||||
|
||||
|
||||
#if (_WIZCHIP_ == W6100)
|
||||
static void wizchip_read_buf(uint8_t* rx_data, datasize_t len) {
|
||||
uint8_t tx_data = 0xFF;
|
||||
|
||||
spi_read_blocking(SPI_PORT, tx_data, rx_data, len);
|
||||
}
|
||||
|
||||
static void wizchip_write_buf(uint8_t* tx_data, datasize_t len) {
|
||||
spi_write_blocking(SPI_PORT, tx_data, len);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
#ifdef USE_SPI_DMA
|
||||
static void wizchip_read_burst(uint8_t *pBuf, uint16_t len) {
|
||||
uint8_t dummy_data = 0xFF;
|
||||
|
||||
channel_config_set_read_increment(&dma_channel_config_tx, false);
|
||||
channel_config_set_write_increment(&dma_channel_config_tx, false);
|
||||
dma_channel_configure(dma_tx, &dma_channel_config_tx,
|
||||
&spi_get_hw(SPI_PORT)->dr, // write address
|
||||
&dummy_data, // read address
|
||||
len, // element count (each element is of size transfer_data_size)
|
||||
false); // don't start yet
|
||||
|
||||
channel_config_set_read_increment(&dma_channel_config_rx, false);
|
||||
channel_config_set_write_increment(&dma_channel_config_rx, true);
|
||||
dma_channel_configure(dma_rx, &dma_channel_config_rx,
|
||||
pBuf, // write address
|
||||
&spi_get_hw(SPI_PORT)->dr, // read address
|
||||
len, // element count (each element is of size transfer_data_size)
|
||||
false); // don't start yet
|
||||
|
||||
dma_start_channel_mask((1u << dma_tx) | (1u << dma_rx));
|
||||
dma_channel_wait_for_finish_blocking(dma_rx);
|
||||
}
|
||||
|
||||
static void wizchip_write_burst(uint8_t *pBuf, uint16_t len) {
|
||||
uint8_t dummy_data;
|
||||
|
||||
channel_config_set_read_increment(&dma_channel_config_tx, true);
|
||||
channel_config_set_write_increment(&dma_channel_config_tx, false);
|
||||
dma_channel_configure(dma_tx, &dma_channel_config_tx,
|
||||
&spi_get_hw(SPI_PORT)->dr, // write address
|
||||
pBuf, // read address
|
||||
len, // element count (each element is of size transfer_data_size)
|
||||
false); // don't start yet
|
||||
|
||||
channel_config_set_read_increment(&dma_channel_config_rx, false);
|
||||
channel_config_set_write_increment(&dma_channel_config_rx, false);
|
||||
dma_channel_configure(dma_rx, &dma_channel_config_rx,
|
||||
&dummy_data, // write address
|
||||
&spi_get_hw(SPI_PORT)->dr, // read address
|
||||
len, // element count (each element is of size transfer_data_size)
|
||||
false); // don't start yet
|
||||
|
||||
dma_start_channel_mask((1u << dma_tx) | (1u << dma_rx));
|
||||
dma_channel_wait_for_finish_blocking(dma_rx);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static void wizchip_critical_section_lock(void) {
|
||||
critical_section_enter_blocking(&g_wizchip_cri_sec);
|
||||
}
|
||||
|
||||
static void wizchip_critical_section_unlock(void) {
|
||||
critical_section_exit(&g_wizchip_cri_sec);
|
||||
}
|
||||
|
||||
void wizchip_spi_initialize(void) {
|
||||
#ifdef USE_PIO
|
||||
spi_handle = wiznet_spi_pio_open(&g_spi_config);
|
||||
(*spi_handle)->set_active(spi_handle);
|
||||
#else
|
||||
// this example will use SPI0 at 5MHz
|
||||
spi_init(SPI_PORT, SPI_CLK * 1000 * 1000);
|
||||
|
||||
gpio_set_function(PIN_SCK, GPIO_FUNC_SPI);
|
||||
gpio_set_function(PIN_MOSI, GPIO_FUNC_SPI);
|
||||
gpio_set_function(PIN_MISO, GPIO_FUNC_SPI);
|
||||
|
||||
// make the SPI pins available to picotool
|
||||
bi_decl(bi_3pins_with_func(PIN_MISO, PIN_MOSI, PIN_SCK, GPIO_FUNC_SPI));
|
||||
|
||||
// chip select is active-low, so we'll initialise it to a driven-high state
|
||||
gpio_init(PIN_CS);
|
||||
gpio_set_dir(PIN_CS, GPIO_OUT);
|
||||
gpio_put(PIN_CS, 1);
|
||||
|
||||
// make the SPI pins available to picotool
|
||||
bi_decl(bi_1pin_with_name(PIN_CS, "W5x00 CHIP SELECT"));
|
||||
|
||||
#ifdef USE_SPI_DMA
|
||||
dma_tx = dma_claim_unused_channel(true);
|
||||
dma_rx = dma_claim_unused_channel(true);
|
||||
|
||||
dma_channel_config_tx = dma_channel_get_default_config(dma_tx);
|
||||
channel_config_set_transfer_data_size(&dma_channel_config_tx, DMA_SIZE_8);
|
||||
channel_config_set_dreq(&dma_channel_config_tx, DREQ_SPI0_TX);
|
||||
|
||||
// We set the inbound DMA to transfer from the SPI receive FIFO to a memory buffer paced by the SPI RX FIFO DREQ
|
||||
// We coinfigure the read address to remain unchanged for each element, but the write
|
||||
// address to increment (so data is written throughout the buffer)
|
||||
dma_channel_config_rx = dma_channel_get_default_config(dma_rx);
|
||||
channel_config_set_transfer_data_size(&dma_channel_config_rx, DMA_SIZE_8);
|
||||
channel_config_set_dreq(&dma_channel_config_rx, DREQ_SPI0_RX);
|
||||
channel_config_set_read_increment(&dma_channel_config_rx, false);
|
||||
channel_config_set_write_increment(&dma_channel_config_rx, true);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void wizchip_cris_initialize(void) {
|
||||
critical_section_init(&g_wizchip_cri_sec);
|
||||
reg_wizchip_cris_cbfunc(wizchip_critical_section_lock, wizchip_critical_section_unlock);
|
||||
}
|
||||
|
||||
void wizchip_initialize(void) {
|
||||
|
||||
#ifdef USE_PIO
|
||||
(*spi_handle)->frame_end();
|
||||
#if (_WIZCHIP_ == W6300)
|
||||
reg_wizchip_qspi_cbfunc((*spi_handle)->read_byte, (*spi_handle)->write_byte);
|
||||
#else
|
||||
reg_wizchip_spi_cbfunc((*spi_handle)->read_byte, (*spi_handle)->write_byte);
|
||||
reg_wizchip_spiburst_cbfunc((*spi_handle)->read_buffer, (*spi_handle)->write_buffer);
|
||||
#endif
|
||||
reg_wizchip_cs_cbfunc((*spi_handle)->frame_start, (*spi_handle)->frame_end);
|
||||
|
||||
#else
|
||||
/* Deselect the FLASH : chip select high */
|
||||
wizchip_deselect();
|
||||
/* CS function register */
|
||||
reg_wizchip_cs_cbfunc(wizchip_select, wizchip_deselect);
|
||||
/* SPI function register */
|
||||
#if (_WIZCHIP_ == W6100)
|
||||
reg_wizchip_spi_cbfunc(wizchip_read, wizchip_write, wizchip_read_buf, wizchip_write_buf);
|
||||
#else
|
||||
reg_wizchip_spi_cbfunc(wizchip_read, wizchip_write);
|
||||
#endif
|
||||
#endif
|
||||
#ifdef USE_SPI_DMA
|
||||
reg_wizchip_spiburst_cbfunc(wizchip_read_burst, wizchip_write_burst);
|
||||
#endif
|
||||
|
||||
/* W5x00, W6x00 initialize */
|
||||
uint8_t temp;
|
||||
#if (_WIZCHIP_ == W5100S)
|
||||
uint8_t memsize[2][4] = {{2, 2, 2, 2}, {2, 2, 2, 2}};
|
||||
#elif (_WIZCHIP_ == W5500)
|
||||
uint8_t memsize[2][8] = {{2, 2, 2, 2, 2, 2, 2, 2}, {2, 2, 2, 2, 2, 2, 2, 2}};
|
||||
#elif (_WIZCHIP_ == W6100)
|
||||
uint8_t memsize[2][8] = {{2, 2, 2, 2, 2, 2, 2, 2}, {2, 2, 2, 2, 2, 2, 2, 2}};
|
||||
#elif (_WIZCHIP_ == W6300)
|
||||
uint8_t memsize[2][8] = {{4, 4, 4, 4, 4, 4, 4, 4}, {4, 4, 4, 4, 4, 4, 4, 4}};
|
||||
#endif
|
||||
|
||||
if (ctlwizchip(CW_INIT_WIZCHIP, (void *)memsize) == -1) {
|
||||
#if _WIZCHIP_ <= W5500
|
||||
printf(" W5x00 initialized fail\n");
|
||||
#else
|
||||
printf(" W6x00 initialized fail\n");
|
||||
#endif
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
void wizchip_check(void) {
|
||||
#if (_WIZCHIP_ == W5100S)
|
||||
/* Read version register */
|
||||
if (getVER() != 0x51) {
|
||||
printf(" ACCESS ERR : VERSION != 0x51, read value = 0x%02x\n", getVER());
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
#elif (_WIZCHIP_ == W5500)
|
||||
/* Read version register */
|
||||
if (getVERSIONR() != 0x04) {
|
||||
printf(" ACCESS ERR : VERSION != 0x04, read value = 0x%02x\n", getVERSIONR());
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
#elif (_WIZCHIP_ == W6100)
|
||||
/* Read version register */
|
||||
if (getCIDR() != 0x6100) {
|
||||
printf(" ACCESS ERR : VERSION != 0x6100, read value = 0x%02x\n", getCIDR());
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
#elif (_WIZCHIP_ == W6300)
|
||||
/* Read version register */
|
||||
if (getCIDR() != 0x6300) {
|
||||
printf(" ACCESS ERR : VERSION != 0x6100, read value = 0x%02x\n", getCIDR());
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Network */
|
||||
void network_initialize(wiz_NetInfo net_info) {
|
||||
#if _WIZCHIP_ <= W5500
|
||||
ctlnetwork(CN_SET_NETINFO, (void *)&net_info);
|
||||
#else
|
||||
uint8_t syslock = SYS_NET_LOCK;
|
||||
ctlwizchip(CW_SYS_UNLOCK, &syslock);
|
||||
ctlnetwork(CN_SET_NETINFO, (void *)&net_info);
|
||||
#endif
|
||||
}
|
||||
|
||||
void print_network_information(wiz_NetInfo net_info) {
|
||||
uint8_t tmp_str[8] = {
|
||||
0,
|
||||
};
|
||||
|
||||
ctlnetwork(CN_GET_NETINFO, (void *)&net_info);
|
||||
ctlwizchip(CW_GET_ID, (void *)tmp_str);
|
||||
#if _WIZCHIP_ <= W5500
|
||||
if (net_info.dhcp == NETINFO_DHCP) {
|
||||
printf("====================================================================================================\n");
|
||||
printf(" %s network configuration : DHCP\n\n", (char *)tmp_str);
|
||||
} else {
|
||||
printf("====================================================================================================\n");
|
||||
printf(" %s network configuration : static\n\n", (char *)tmp_str);
|
||||
}
|
||||
|
||||
printf(" MAC : %02X:%02X:%02X:%02X:%02X:%02X\n", net_info.mac[0], net_info.mac[1], net_info.mac[2], net_info.mac[3], net_info.mac[4], net_info.mac[5]);
|
||||
printf(" IP : %d.%d.%d.%d\n", net_info.ip[0], net_info.ip[1], net_info.ip[2], net_info.ip[3]);
|
||||
printf(" Subnet Mask : %d.%d.%d.%d\n", net_info.sn[0], net_info.sn[1], net_info.sn[2], net_info.sn[3]);
|
||||
printf(" Gateway : %d.%d.%d.%d\n", net_info.gw[0], net_info.gw[1], net_info.gw[2], net_info.gw[3]);
|
||||
printf(" DNS : %d.%d.%d.%d\n", net_info.dns[0], net_info.dns[1], net_info.dns[2], net_info.dns[3]);
|
||||
printf("====================================================================================================\n\n");
|
||||
#else
|
||||
printf("==========================================================\n");
|
||||
printf(" %s network configuration\n\n", (char *)tmp_str);
|
||||
|
||||
printf(" MAC : %02X:%02X:%02X:%02X:%02X:%02X\n", net_info.mac[0], net_info.mac[1], net_info.mac[2], net_info.mac[3], net_info.mac[4], net_info.mac[5]);
|
||||
printf(" IP : %d.%d.%d.%d\n", net_info.ip[0], net_info.ip[1], net_info.ip[2], net_info.ip[3]);
|
||||
printf(" Subnet Mask : %d.%d.%d.%d\n", net_info.sn[0], net_info.sn[1], net_info.sn[2], net_info.sn[3]);
|
||||
printf(" Gateway : %d.%d.%d.%d\n", net_info.gw[0], net_info.gw[1], net_info.gw[2], net_info.gw[3]);
|
||||
printf(" DNS : %d.%d.%d.%d\n", net_info.dns[0], net_info.dns[1], net_info.dns[2], net_info.dns[3]);
|
||||
print_ipv6_addr(" GW6 ", net_info.gw6);
|
||||
print_ipv6_addr(" LLA ", net_info.lla);
|
||||
print_ipv6_addr(" GUA ", net_info.gua);
|
||||
print_ipv6_addr(" SUB6", net_info.sn6);
|
||||
print_ipv6_addr(" DNS6", net_info.dns6);
|
||||
printf("==========================================================\n\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
void print_ipv6_addr(uint8_t* name, uint8_t* ip6addr) {
|
||||
printf("%s : ", name);
|
||||
printf("%04X:%04X", ((uint16_t)ip6addr[0] << 8) | ((uint16_t)ip6addr[1]), ((uint16_t)ip6addr[2] << 8) | ((uint16_t)ip6addr[3]));
|
||||
printf(":%04X:%04X", ((uint16_t)ip6addr[4] << 8) | ((uint16_t)ip6addr[5]), ((uint16_t)ip6addr[6] << 8) | ((uint16_t)ip6addr[7]));
|
||||
printf(":%04X:%04X", ((uint16_t)ip6addr[8] << 8) | ((uint16_t)ip6addr[9]), ((uint16_t)ip6addr[10] << 8) | ((uint16_t)ip6addr[11]));
|
||||
printf(":%04X:%04X\r\n", ((uint16_t)ip6addr[12] << 8) | ((uint16_t)ip6addr[13]), ((uint16_t)ip6addr[14] << 8) | ((uint16_t)ip6addr[15]));
|
||||
}
|
||||
@@ -0,0 +1,236 @@
|
||||
/**
|
||||
Copyright (c) 2022 WIZnet Co.,Ltd
|
||||
|
||||
SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
||||
#ifndef _WIZCHIP_SPI_H_
|
||||
#define _WIZCHIP_SPI_H_
|
||||
|
||||
#include "board_list.h"
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Macros
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
/* SPI */
|
||||
#if (DEVICE_BOARD_NAME == W55RP20_EVB_PICO)
|
||||
|
||||
#define USE_PIO
|
||||
#define WIZNET_SPI_CLKDIV_MAJOR_DEFAULT 2
|
||||
#define WIZNET_SPI_CLKDIV_MINOR_DEFAULT 0
|
||||
|
||||
#define PIN_CS 20
|
||||
#define PIN_SCK 21
|
||||
#define PIN_MOSI 23
|
||||
#define PIN_MISO 22
|
||||
#define PIN_INT 24
|
||||
#define PIN_RST 25
|
||||
|
||||
#elif (DEVICE_BOARD_NAME == W6300_EVB_PICO || DEVICE_BOARD_NAME == W6300_EVB_PICO2)
|
||||
|
||||
#define USE_PIO
|
||||
#define WIZNET_SPI_CLKDIV_MAJOR_DEFAULT 2
|
||||
#define WIZNET_SPI_CLKDIV_MINOR_DEFAULT 0
|
||||
|
||||
#define PIN_INT 15
|
||||
#define PIN_CS 16
|
||||
#define PIO_SPI_SCK_PIN 17
|
||||
#define PIO_SPI_DATA_IO0_PIN 18
|
||||
#define PIO_SPI_DATA_IO1_PIN 19
|
||||
#define PIO_SPI_DATA_IO2_PIN 20
|
||||
#define PIO_SPI_DATA_IO3_PIN 21
|
||||
#define PIN_RST 22
|
||||
|
||||
#else
|
||||
/* SPI */
|
||||
#define SPI_PORT spi0
|
||||
#define SPI_CLK 10
|
||||
|
||||
#define PIN_SCK 18
|
||||
#define PIN_MOSI 19
|
||||
#define PIN_MISO 16
|
||||
#define PIN_CS 17
|
||||
#define PIN_RST 20
|
||||
#define PIN_INT 21
|
||||
|
||||
/* Use SPI DMA */
|
||||
//#define USE_SPI_DMA // if you want to use SPI DMA, uncomment.
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
----------------------------------------------------------------------------------------------------
|
||||
Functions
|
||||
----------------------------------------------------------------------------------------------------
|
||||
*/
|
||||
/* wizchip */
|
||||
/*! \brief Set CS pin
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set chip select pin of spi0 to low(Active low).
|
||||
|
||||
\param none
|
||||
*/
|
||||
static inline void wizchip_select(void);
|
||||
|
||||
/*! \brief Set CS pin
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set chip select pin of spi0 to high(Inactive high).
|
||||
|
||||
\param none
|
||||
*/
|
||||
static inline void wizchip_deselect(void);
|
||||
|
||||
/*! \brief Read from an SPI device, blocking
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set spi_read_blocking function.
|
||||
Read byte from SPI to rx_data buffer.
|
||||
Blocks until all data is transferred. No timeout, as SPI hardware always transfers at a known data rate.
|
||||
|
||||
\param none
|
||||
*/
|
||||
static uint8_t wizchip_read(void);
|
||||
|
||||
/*! \brief Write to an SPI device, blocking
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set spi_write_blocking function.
|
||||
Write byte from tx_data buffer to SPI device.
|
||||
Blocks until all data is transferred. No timeout, as SPI hardware always transfers at a known data rate.
|
||||
|
||||
\param tx_data Buffer of data to write
|
||||
*/
|
||||
static void wizchip_write(uint8_t tx_data);
|
||||
|
||||
|
||||
#if (_WIZCHIP_ == W6100)
|
||||
static void wizchip_read_buf(uint8_t* rx_data, datasize_t len);
|
||||
static void wizchip_write_buf(uint8_t* tx_data, datasize_t len);
|
||||
#endif
|
||||
|
||||
#ifdef USE_SPI_DMA
|
||||
/*! \brief Configure all DMA parameters and optionally start transfer
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Configure all DMA parameters and read from DMA
|
||||
|
||||
\param pBuf Buffer of data to read
|
||||
\param len element count (each element is of size transfer_data_size)
|
||||
*/
|
||||
static void wizchip_read_burst(uint8_t *pBuf, uint16_t len);
|
||||
|
||||
/*! \brief Configure all DMA parameters and optionally start transfer
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Configure all DMA parameters and write to DMA
|
||||
|
||||
\param pBuf Buffer of data to write
|
||||
\param len element count (each element is of size transfer_data_size)
|
||||
*/
|
||||
static void wizchip_write_burst(uint8_t *pBuf, uint16_t len);
|
||||
#endif
|
||||
|
||||
/*! \brief Enter a critical section
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set ciritical section enter blocking function.
|
||||
If the spin lock associated with this critical section is in use, then this
|
||||
method will block until it is released.
|
||||
|
||||
\param none
|
||||
*/
|
||||
static void wizchip_critical_section_lock(void);
|
||||
|
||||
/*! \brief Release a critical section
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set ciritical section exit function.
|
||||
Release a critical section.
|
||||
|
||||
\param none
|
||||
*/
|
||||
static void wizchip_critical_section_unlock(void);
|
||||
|
||||
/*! \brief Initialize SPI instances and Set DMA channel
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set GPIO to spi0.
|
||||
Puts the SPI into a known state, and enable it.
|
||||
Set DMA channel completion channel.
|
||||
|
||||
\param none
|
||||
*/
|
||||
void wizchip_spi_initialize(void);
|
||||
|
||||
/*! \brief Initialize a critical section structure
|
||||
\ingroup wizchip_spi
|
||||
|
||||
The critical section is initialized ready for use.
|
||||
Registers callback function for critical section for WIZchip.
|
||||
|
||||
\param none
|
||||
*/
|
||||
void wizchip_cris_initialize(void);
|
||||
|
||||
/*! \brief wizchip reset
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set a reset pin and reset.
|
||||
|
||||
\param none
|
||||
*/
|
||||
void wizchip_reset(void);
|
||||
|
||||
/*! \brief Initialize WIZchip
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set callback function to read/write byte using SPI & QSPI.
|
||||
Set callback function for WIZchip select/deselect.
|
||||
Set memory size of wizchip and monitor PHY link status.
|
||||
|
||||
\param none
|
||||
*/
|
||||
void wizchip_initialize(void);
|
||||
|
||||
/*! \brief Check chip version
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Get version information.
|
||||
|
||||
\param none
|
||||
*/
|
||||
void wizchip_check(void);
|
||||
|
||||
/* Network */
|
||||
/*! \brief Initialize network
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Set network information.
|
||||
|
||||
\param net_info network information.
|
||||
*/
|
||||
void network_initialize(wiz_NetInfo net_info);
|
||||
|
||||
/*! \brief Print network information
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Print network information about MAC address, IP address, Subnet mask, Gateway, DHCP and DNS address.
|
||||
|
||||
\param net_info network information.
|
||||
*/
|
||||
void print_network_information(wiz_NetInfo net_info);
|
||||
|
||||
/*! \brief Print IPv6 Address
|
||||
\ingroup wizchip_spi
|
||||
|
||||
Print IPv6 Address.
|
||||
|
||||
\param net_info network information.
|
||||
*/
|
||||
void print_ipv6_addr(uint8_t* name, uint8_t* ip6addr);
|
||||
|
||||
#endif /* _WIZCHIP_SPI_H_ */
|
||||
+17
@@ -3,6 +3,11 @@
|
||||
#include "pico/bootrom.h"
|
||||
#include "device.h"
|
||||
|
||||
extern "C" {
|
||||
#include "wizchip_conf.h"
|
||||
#include "wizchip_spi.h"
|
||||
}
|
||||
|
||||
static void send_bytes(const std::vector<uint8_t> &data) {
|
||||
for (auto b : data) {
|
||||
putchar(b);
|
||||
@@ -10,9 +15,21 @@ static void send_bytes(const std::vector<uint8_t> &data) {
|
||||
stdio_flush();
|
||||
}
|
||||
|
||||
static bool w6300_init() {
|
||||
wizchip_spi_initialize();
|
||||
wizchip_cris_initialize();
|
||||
wizchip_reset();
|
||||
wizchip_initialize();
|
||||
return getCIDR() == 0x6300;
|
||||
}
|
||||
|
||||
int main() {
|
||||
stdio_init_all();
|
||||
|
||||
if (!w6300_init()) {
|
||||
printf("W6300 init failed\n");
|
||||
}
|
||||
|
||||
static static_vector<uint8_t, 256> rx_buf;
|
||||
|
||||
while (true) {
|
||||
|
||||
Reference in New Issue
Block a user