Sharpen MCIA open question from mlx5_ifc.h register format; drop offline-rig and instrumentation-flow framing
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@@ -6,9 +6,9 @@ The genuinely open, thinking-worthy problems — nothing here is resolved. Analy
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The decisive unknown for product diagnostics coverage ([nics/connectx-5/](nics/connectx-5/README.md)):
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- Does firmware MCIA accept **arbitrary I2C device addresses**? The BCM bridge sits at 0x56; kernel paths only ever use 0x50/0x51.
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- Can the BCM SMI **read data phase** (raw 2-byte read, no offset write) be framed through MCIA's offset model?
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- If no to either: product diagnostics via the Marvell/Aquantia modules only, X520 kept as an offline BCM rig.
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- Does firmware MCIA accept **arbitrary I2C device addresses**? The register format allows it (8-bit field, per-access status — verified in `mlx5_ifc.h`); firmware acceptance is the unknown.
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- Does the BCM bridge **tolerate an offset write before its SMI read phase**? MCIA has no raw-read encoding, so this module-side property is the whole question — and it is testable on the X520 before the card arrives.
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- If no to either: product diagnostics via the Marvell/Aquantia modules only.
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## 2. ECD run disturbance
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