1.8 KiB
Open questions
The genuinely open, thinking-worthy problems — nothing here is resolved. Analyses and settled facts live in the device docs; each entry points at the doc that holds its detail. Read state.md first for placement context.
1. Can ConnectX-5 MCIA reach the BCM? (decide on arrival)
The decisive unknown for product diagnostics coverage (nics/connectx-5/):
- Does firmware MCIA accept arbitrary I2C device addresses? The register format allows it (8-bit field, per-access status — verified in
mlx5_ifc.h); firmware acceptance is the unknown. - Does the BCM bridge tolerate an offset write before its SMI read phase? MCIA has no raw-read encoding, so this module-side property is the whole question — and it is testable on the X520 before the card arrives.
- If no to either: product diagnostics via the Marvell/Aquantia modules only.
2. ECD run disturbance
The BCM ECD run blips the link (PMA 1.1 latch-low catches a drop even with the break-link bit clear). Until the disturbance is characterized, length measurement is a between-runs operation, not a during-run one (modules/fs/).
3. Pre-FEC correlation run
The register question is answered (post-FEC vs corrected-by-iteration histogram located); the graded-noise correlation run that verifies the expected ordering has not happened. Design and instrument: modules/fibergaga/.
4. Wiitek VCT — pursue or leave dead?
No confirmed-safe path exists (every candidate lands in the µC danger window). The open decision is whether the capability is worth the NDA route or a sacrificial unit — the product doesn't need it for length (modules/wiitek/, modules/README.md).