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Record X520 ixgbe raw-i2c patch and BCM client prep in state doc

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flamingcow
2026-08-10 11:21:49 -07:00
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@@ -13,9 +13,14 @@ AF_PACKET raw sockets everywhere (`sock.go`), flow-director steering, read-time-
- 1× Fibergaga SFP-10G-T-30M (Aquantia, RollBall, the proven oracle module). - 1× Fibergaga SFP-10G-T-30M (Aquantia, RollBall, the proven oracle module).
- 1× 10Gtek, EEPROM claims SFP-10G-SR — still a copper RJ45 module; filler, not part of the test set. - 1× 10Gtek, EEPROM claims SFP-10G-SR — still a copper RJ45 module; filler, not part of the test set.
## X520 prep — built ahead of the card, untested (no hardware yet)
In `~/work/` alongside the ice-sff/phydiag-work artifacts, ready to fold into the repo's `kernel/` once validated on real hardware:
- **Patched ixgbe** (`~/work/ixgbe-sff/`, built against the running kernel, vermagic matches): adds `ixgbe_i2c_raw_write`/`ixgbe_i2c_raw_read` in `ixgbe_phy.c` (arbitrary START…STOP transactions built from the existing bit-bang primitives, swfw-semaphore bracketed) and an `sff_i2c` debugfs file with `w <addr8> <bytes…>` / `r <addr8> <n>` commands, result read back from the fd. Modeled on the proven ice `sff_i2c`; ixgbe has no firmware to refuse, so arbitrary framing works. `load-ixgbe` rebuilds + swaps the module.
- **BCM client** (`~/work/phydiag-work/bcm_ixgbe.py`): BCM SMI framing on those two ops (read = write `[001+devad,RegH,RegL]`, >1 ms delay, read 2 B; write = 5-byte frame) plus the full command handler (`_wait_idle` → DATA → CMD|bit15 → poll PASS/ERROR → read DATA), `CMD_GET_SNR` decoded to per-pair dB, and EEPROM/PHY-ID/STATUS sanity reads. The same two ops compose RollBall for the Wiiteks.
## Bringup plan when the X520 arrives ## Bringup plan when the X520 arrives
1. ixgbe debugfs patch exposing raw I2C transactions (model: the ice `sff_i2c` patch in `kernel/`; ixgbe has no firmware to refuse, so arbitrary framing works). 1. Install card, move FS modules in, `./load-ixgbe`, confirm `sff_i2c` appears.
2. FS/BCM modules first: prove the SMI transport against known-value registers, then the command handler (CMD_GET_SNR vs IEEE registers), on the test cable set. 2. FS/BCM modules first: `bcm_ixgbe.py` sanity reads (EEPROM, PHY ID, STATUS) to prove the SMI transport, then the command handler (CMD_GET_SNR vs the IEEE registers) on the test cable set.
3. Replacement Wiiteks: IEEE-standard registers only (SNR, latches) unless/until a documented recipe exists for more; the VCT templates in modules.md are candidates for single-shot targeted probes on a sacrificial unit only. 3. Replacement Wiiteks: IEEE-standard registers only (SNR, latches) unless/until a documented recipe exists for more; the VCT templates in modules.md are candidates for single-shot targeted probes on a sacrificial unit only.
4. Re-derive host tuning on ixgbe (coalescing/ring syntax differs) and re-verify the rxnfc flow-steering code against ixgbe's fdir. 4. Re-derive host tuning on ixgbe (coalescing/ring syntax differs) and re-verify the rxnfc flow-steering code against ixgbe's fdir.