#include <cstring>
#include <initializer_list>
#include "pico/stdlib.h"
#include "pico/error.h"
#include "pico/critical_section.h"
#include "hardware/dma.h"
#include "hardware/clocks.h"
#include "w6300.h"
#include "qspi.pio.h"

namespace w6300 {
namespace {

#define PIO_PROGRAM_NAME qspi
#define PIO_PROGRAM_FUNC __CONCAT(PIO_PROGRAM_NAME, _program)
#define PIO_PROGRAM_GET_DEFAULT_CONFIG_FUNC __CONCAT(PIO_PROGRAM_NAME, _program_get_default_config)
#define PIO_OFFSET_WRITE_BITS __CONCAT(PIO_PROGRAM_NAME, _offset_write_bits)
#define PIO_OFFSET_WRITE_BITS_END __CONCAT(PIO_PROGRAM_NAME, _offset_write_bits_end)
#define PIO_OFFSET_READ_BITS_END __CONCAT(PIO_PROGRAM_NAME, _offset_read_bits_end)

constexpr uint8_t PIN_INT              = 15;
constexpr uint8_t PIN_CS               = 16;
constexpr uint8_t PIO_SPI_SCK_PIN      = 17;
constexpr uint8_t PIO_SPI_DATA_IO0_PIN = 18;
constexpr uint8_t PIO_SPI_DATA_IO1_PIN = 19;
constexpr uint8_t PIO_SPI_DATA_IO2_PIN = 20;
constexpr uint8_t PIO_SPI_DATA_IO3_PIN = 21;
constexpr uint8_t PIN_RST              = 22;

constexpr uint16_t SPI_CLKDIV_MAJOR = 2;
constexpr uint8_t  SPI_CLKDIV_MINOR = 0;

constexpr uint32_t PADS_DRIVE = PADS_BANK0_GPIO0_DRIVE_VALUE_12MA;
constexpr uint32_t IRQ_DELAY_NS = 100;
constexpr uint32_t QSPI_LOOP_CNT = 2;

struct {
    pio_hw_t *pio;
    uint8_t pio_func_sel;
    int8_t pio_offset;
    int8_t pio_sm;
    int8_t dma_out;
    int8_t dma_in;
} state;

uint16_t mk_cmd_buf(uint8_t *pdst, uint8_t opcode, uint16_t addr) {
    pdst[0] = ((opcode >> 7 & 0x01) << 4) | ((opcode >> 6 & 0x01) << 0);
    pdst[1] = ((opcode >> 5 & 0x01) << 4) | ((opcode >> 4 & 0x01) << 0);
    pdst[2] = ((opcode >> 3 & 0x01) << 4) | ((opcode >> 2 & 0x01) << 0);
    pdst[3] = ((opcode >> 1 & 0x01) << 4) | ((opcode >> 0 & 0x01) << 0);
    pdst[4] = (uint8_t)(addr >> 8);
    pdst[5] = (uint8_t)(addr);
    pdst[6] = 0;
    return 7;
}

uint32_t data_pin_mask() {
    return (1u << PIO_SPI_DATA_IO0_PIN) | (1u << PIO_SPI_DATA_IO1_PIN) |
           (1u << PIO_SPI_DATA_IO2_PIN) | (1u << PIO_SPI_DATA_IO3_PIN);
}

__noinline void ns_delay(uint32_t ns) {
    uint32_t cycles = ns * (clock_get_hz(clk_sys) >> 16u) / (1000000000u >> 16u);
    busy_wait_at_least_cycles(cycles);
}

void pio_init() {
    for (auto pin : {PIO_SPI_DATA_IO0_PIN, PIO_SPI_DATA_IO1_PIN, PIO_SPI_DATA_IO2_PIN, PIO_SPI_DATA_IO3_PIN}) {
        gpio_init(pin);
        gpio_set_dir(pin, GPIO_OUT);
        gpio_put(pin, false);
    }
    gpio_init(PIN_CS);
    gpio_set_dir(PIN_CS, GPIO_OUT);
    gpio_put(PIN_CS, true);
    gpio_init(PIN_INT);
    gpio_set_dir(PIN_INT, GPIO_IN);
    gpio_set_pulls(PIN_INT, false, false);

    pio_hw_t *pios[2] = {pio0, pio1};
    uint pio_index = 1;
    if (!pio_can_add_program(pios[pio_index], &PIO_PROGRAM_FUNC)) {
        pio_index ^= 1;
        assert(pio_can_add_program(pios[pio_index], &PIO_PROGRAM_FUNC));
    }

    state.pio = pios[pio_index];
    state.dma_in = -1;
    state.dma_out = -1;

    static_assert(GPIO_FUNC_PIO1 == GPIO_FUNC_PIO0 + 1);
    state.pio_func_sel = GPIO_FUNC_PIO0 + pio_index;
    state.pio_sm = (int8_t)pio_claim_unused_sm(state.pio, true);
    state.pio_offset = pio_add_program(state.pio, &PIO_PROGRAM_FUNC);

    pio_sm_config sm_config = PIO_PROGRAM_GET_DEFAULT_CONFIG_FUNC(state.pio_offset);
    sm_config_set_clkdiv_int_frac(&sm_config, SPI_CLKDIV_MAJOR, SPI_CLKDIV_MINOR);

    hw_write_masked(&pads_bank0_hw->io[PIO_SPI_SCK_PIN],
                    (uint)PADS_DRIVE << PADS_BANK0_GPIO0_DRIVE_LSB,
                    PADS_BANK0_GPIO0_DRIVE_BITS);
    hw_write_masked(&pads_bank0_hw->io[PIO_SPI_SCK_PIN],
                    1u << PADS_BANK0_GPIO0_SLEWFAST_LSB,
                    PADS_BANK0_GPIO0_SLEWFAST_BITS);

    sm_config_set_out_pins(&sm_config, PIO_SPI_DATA_IO0_PIN, 4);
    sm_config_set_in_pins(&sm_config, PIO_SPI_DATA_IO0_PIN);
    sm_config_set_set_pins(&sm_config, PIO_SPI_DATA_IO0_PIN, 4);
    sm_config_set_sideset(&sm_config, 1, false, false);
    sm_config_set_sideset_pins(&sm_config, PIO_SPI_SCK_PIN);
    sm_config_set_in_shift(&sm_config, false, true, 8);
    sm_config_set_out_shift(&sm_config, false, true, 8);
    hw_set_bits(&state.pio->input_sync_bypass, data_pin_mask());
    pio_sm_set_config(state.pio, state.pio_sm, &sm_config);
    pio_sm_set_consecutive_pindirs(state.pio, state.pio_sm, PIO_SPI_SCK_PIN, 1, true);

    for (auto pin : {PIO_SPI_DATA_IO0_PIN, PIO_SPI_DATA_IO1_PIN, PIO_SPI_DATA_IO2_PIN, PIO_SPI_DATA_IO3_PIN}) {
        gpio_set_function(pin, (gpio_function_t)state.pio_func_sel);
        gpio_set_pulls(pin, false, true);
        gpio_set_input_hysteresis_enabled(pin, true);
    }

    pio_sm_exec(state.pio, state.pio_sm, pio_encode_set(pio_pins, 1));

    state.dma_out = (int8_t)dma_claim_unused_channel(true);
    state.dma_in = (int8_t)dma_claim_unused_channel(true);
}


void pio_frame_start() {
    for (auto pin : {PIO_SPI_DATA_IO0_PIN, PIO_SPI_DATA_IO1_PIN, PIO_SPI_DATA_IO2_PIN, PIO_SPI_DATA_IO3_PIN})
        gpio_set_function(pin, (gpio_function_t)state.pio_func_sel);
    gpio_set_function(PIO_SPI_SCK_PIN, (gpio_function_t)state.pio_func_sel);
    gpio_pull_down(PIO_SPI_SCK_PIN);
    gpio_put(PIN_CS, false);
}

void pio_frame_end() {
    gpio_put(PIN_CS, true);
    ns_delay(IRQ_DELAY_NS);
}

void pio_read(uint8_t opcode, uint16_t addr, uint8_t* buf, uint16_t len) {
    uint8_t cmd[8] = {};
    uint16_t cmd_len = mk_cmd_buf(cmd, opcode, addr);

    pio_sm_set_enabled(state.pio, state.pio_sm, false);
    pio_sm_set_wrap(state.pio, state.pio_sm, state.pio_offset, state.pio_offset + PIO_OFFSET_READ_BITS_END - 1);
    pio_sm_clear_fifos(state.pio, state.pio_sm);
    pio_sm_set_pindirs_with_mask(state.pio, state.pio_sm, data_pin_mask(), data_pin_mask());
    pio_sm_restart(state.pio, state.pio_sm);
    pio_sm_clkdiv_restart(state.pio, state.pio_sm);

    pio_sm_put(state.pio, state.pio_sm, cmd_len * QSPI_LOOP_CNT - 1);
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_out(pio_x, 32));
    pio_sm_put(state.pio, state.pio_sm, len - 1);
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_out(pio_y, 32));
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_jmp(state.pio_offset));

    dma_channel_abort(state.dma_out);
    dma_channel_abort(state.dma_in);

    dma_channel_config out_cfg = dma_channel_get_default_config(state.dma_out);
    channel_config_set_transfer_data_size(&out_cfg, DMA_SIZE_8);
    channel_config_set_bswap(&out_cfg, true);
    channel_config_set_dreq(&out_cfg, pio_get_dreq(state.pio, state.pio_sm, true));
    dma_channel_configure(state.dma_out, &out_cfg, &state.pio->txf[state.pio_sm], cmd, cmd_len, true);

    dma_channel_config in_cfg = dma_channel_get_default_config(state.dma_in);
    channel_config_set_transfer_data_size(&in_cfg, DMA_SIZE_8);
    channel_config_set_bswap(&in_cfg, true);
    channel_config_set_dreq(&in_cfg, pio_get_dreq(state.pio, state.pio_sm, false));
    channel_config_set_write_increment(&in_cfg, true);
    channel_config_set_read_increment(&in_cfg, false);
    dma_channel_configure(state.dma_in, &in_cfg, buf, &state.pio->rxf[state.pio_sm], len, true);

    pio_sm_set_enabled(state.pio, state.pio_sm, true);
    __compiler_memory_barrier();
    dma_channel_wait_for_finish_blocking(state.dma_out);
    dma_channel_wait_for_finish_blocking(state.dma_in);
    __compiler_memory_barrier();
    pio_sm_set_enabled(state.pio, state.pio_sm, false);
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_mov(pio_pins, pio_null));
}

void pio_write(uint8_t opcode, uint16_t addr, uint8_t* buf, uint16_t len) {
    uint8_t cmd[8] = {};
    uint16_t cmd_len = mk_cmd_buf(cmd, opcode, addr);
    uint16_t total = len + cmd_len;

    pio_sm_set_enabled(state.pio, state.pio_sm, false);
    pio_sm_set_wrap(state.pio, state.pio_sm, state.pio_offset, state.pio_offset + PIO_OFFSET_WRITE_BITS_END - 1);
    pio_sm_clear_fifos(state.pio, state.pio_sm);
    pio_sm_set_pindirs_with_mask(state.pio, state.pio_sm, data_pin_mask(), data_pin_mask());
    pio_sm_restart(state.pio, state.pio_sm);
    pio_sm_clkdiv_restart(state.pio, state.pio_sm);

    pio_sm_put(state.pio, state.pio_sm, total * QSPI_LOOP_CNT - 1);
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_out(pio_x, 32));
    pio_sm_put(state.pio, state.pio_sm, 0);
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_out(pio_y, 32));
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_jmp(state.pio_offset));

    dma_channel_abort(state.dma_out);

    dma_channel_config out_cfg = dma_channel_get_default_config(state.dma_out);
    channel_config_set_transfer_data_size(&out_cfg, DMA_SIZE_8);
    channel_config_set_bswap(&out_cfg, true);
    channel_config_set_dreq(&out_cfg, pio_get_dreq(state.pio, state.pio_sm, true));

    pio_sm_set_enabled(state.pio, state.pio_sm, true);
    dma_channel_configure(state.dma_out, &out_cfg, &state.pio->txf[state.pio_sm], cmd, cmd_len, true);
    dma_channel_wait_for_finish_blocking(state.dma_out);
    dma_channel_configure(state.dma_out, &out_cfg, &state.pio->txf[state.pio_sm], buf, len, true);
    dma_channel_wait_for_finish_blocking(state.dma_out);

    const uint32_t stall = 1u << (PIO_FDEBUG_TXSTALL_LSB + state.pio_sm);
    state.pio->fdebug = stall;
    while (!(state.pio->fdebug & stall)) tight_loop_contents();

    __compiler_memory_barrier();
    pio_sm_set_consecutive_pindirs(state.pio, state.pio_sm, PIO_SPI_DATA_IO0_PIN, 4, false);
    pio_sm_exec(state.pio, state.pio_sm, pio_encode_mov(pio_pins, pio_null));
    pio_sm_set_enabled(state.pio, state.pio_sm, false);
}

using iodata_t = uint8_t;
using datasize_t = int16_t;


constexpr uint8_t QSPI_MODE = 0x02 << 6;


constexpr uint16_t PHY_IO_MODE_PHYCR = 0x0000;
constexpr uint16_t PHY_IO_MODE_MII   = 0x0010;
constexpr uint16_t PHY_IO_MODE       = PHY_IO_MODE_MII;

constexpr uint8_t SYS_CHIP_LOCK = (1 << 2);
constexpr uint8_t SYS_NET_LOCK  = (1 << 1);
constexpr uint8_t SYS_PHY_LOCK  = (1 << 0);

constexpr uint8_t PHY_MODE_MANUAL  = 0;
constexpr uint8_t PHY_MODE_AUTONEGO = 1;
constexpr uint8_t PHY_MODE_TE      = 2;
constexpr uint8_t PHY_CONFBY_HW    = 0;
constexpr uint8_t PHY_CONFBY_SW    = 1;
constexpr uint8_t PHY_SPEED_10     = 0;
constexpr uint8_t PHY_SPEED_100    = 1;
constexpr uint8_t PHY_DUPLEX_HALF  = 0;
constexpr uint8_t PHY_DUPLEX_FULL  = 1;
constexpr uint8_t PHY_LINK_OFF     = 0;
constexpr uint8_t PHY_LINK_ON      = 1;
constexpr uint8_t PHY_POWER_NORM   = 0;
constexpr uint8_t PHY_POWER_DOWN   = 1;

constexpr uint8_t PACK_NONE      = static_cast<uint8_t>(pack_info::none);
constexpr uint8_t PACK_FIRST     = static_cast<uint8_t>(pack_info::first);
constexpr uint8_t PACK_REMAINED  = static_cast<uint8_t>(pack_info::remained);
constexpr uint8_t PACK_COMPLETED = static_cast<uint8_t>(pack_info::completed);
constexpr uint8_t PACK_IPv6      = static_cast<uint8_t>(pack_info::ipv6);


enum sockint_kind { SIK_CONNECTED = 1, SIK_DISCONNECTED = 2, SIK_RECEIVED = 4, SIK_TIMEOUT = 8, SIK_SENT = 16, SIK_ALL = 0x1F };


constexpr uint8_t TCPSOCK_MODE = static_cast<uint8_t>(tcp_sock_info::mode);

constexpr uint8_t SPI_READ  = (0x00 << 5);
constexpr uint8_t SPI_WRITE = (0x01 << 5);

constexpr uint32_t CREG_BLOCK           = 0x00;
constexpr uint32_t SREG_BLOCK(uint8_t n) { return 1 + 4 * n; }
constexpr uint32_t TXBUF_BLOCK(uint8_t n) { return 2 + 4 * n; }
constexpr uint32_t RXBUF_BLOCK(uint8_t n) { return 3 + 4 * n; }

constexpr uint32_t offset_inc(uint32_t addr, uint32_t n) { return addr + (n << 8); }

constexpr uint32_t REG_CIDR      = (0x0000 << 8) + CREG_BLOCK;
constexpr uint32_t REG_RTL       = (0x0004 << 8) + CREG_BLOCK;
constexpr uint32_t REG_VER       = (0x0002 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SYSR      = (0x2000 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SYCR0     = (0x2004 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SYCR1     = offset_inc(REG_SYCR0, 1);
constexpr uint32_t REG_TCNTR     = (0x2016 << 8) + CREG_BLOCK;
constexpr uint32_t REG_TCNTRCLR  = (0x2020 << 8) + CREG_BLOCK;
constexpr uint32_t REG_IR        = (0x2100 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SIR       = (0x2101 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLIR      = (0x2102 << 8) + CREG_BLOCK;
constexpr uint32_t REG_IMR       = (0x2104 << 8) + CREG_BLOCK;
constexpr uint32_t REG_IRCLR     = (0x2108 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SIMR      = (0x2114 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLIMR     = (0x2124 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLIRCLR   = (0x2128 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLPSR     = (0x212C << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLCR      = (0x2130 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYSR     = (0x3000 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYRAR    = (0x3008 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYDIR    = (0x300C << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYDOR    = (0x3010 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYACR    = (0x3014 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYDIVR   = (0x3018 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYCR0    = (0x301C << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYCR1    = offset_inc(REG_PHYCR0, 1);
constexpr uint32_t REG_NET4MR    = (0x4000 << 8) + CREG_BLOCK;
constexpr uint32_t REG_NET6MR    = (0x4004 << 8) + CREG_BLOCK;
constexpr uint32_t REG_NETMR     = (0x4008 << 8) + CREG_BLOCK;
constexpr uint32_t REG_NETMR2    = (0x4009 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PTMR      = (0x4100 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PMNR      = (0x4104 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHAR      = (0x4108 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PSIDR     = (0x4110 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PMRUR     = (0x4114 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SHAR      = (0x4120 << 8) + CREG_BLOCK;
constexpr uint32_t REG_GAR       = (0x4130 << 8) + CREG_BLOCK;
constexpr uint32_t REG_GA4R      = REG_GAR;
constexpr uint32_t REG_SUBR      = (0x4134 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SUB4R     = REG_SUBR;
constexpr uint32_t REG_SIPR      = (0x4138 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SIP4R     = REG_SIPR;
constexpr uint32_t REG_LLAR      = (0x4140 << 8) + CREG_BLOCK;
constexpr uint32_t REG_GUAR      = (0x4150 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SUB6R     = (0x4160 << 8) + CREG_BLOCK;
constexpr uint32_t REG_GA6R      = (0x4170 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLDIP6R   = (0x4180 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLDIPR    = (0x418C << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLDIP4R   = REG_SLDIPR;
constexpr uint32_t REG_SLDHAR    = (0x4190 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PINGIDR   = (0x4198 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PINGSEQR  = (0x419C << 8) + CREG_BLOCK;
constexpr uint32_t REG_UIPR      = (0x41A0 << 8) + CREG_BLOCK;
constexpr uint32_t REG_UIP4R     = REG_UIPR;
constexpr uint32_t REG_UPORTR    = (0x41A4 << 8) + CREG_BLOCK;
constexpr uint32_t REG_UPORT4R   = REG_UPORTR;
constexpr uint32_t REG_UIP6R     = (0x41B0 << 8) + CREG_BLOCK;
constexpr uint32_t REG_UPORT6R   = (0x41C0 << 8) + CREG_BLOCK;
constexpr uint32_t REG_INTPTMR   = (0x41C5 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PLR       = (0x41D0 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PFR       = (0x41D4 << 8) + CREG_BLOCK;
constexpr uint32_t REG_VLTR      = (0x41D8 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PLTR      = (0x41DC << 8) + CREG_BLOCK;
constexpr uint32_t REG_PAR       = (0x41E0 << 8) + CREG_BLOCK;
constexpr uint32_t REG_ICMP6BLKR = (0x41F0 << 8) + CREG_BLOCK;
constexpr uint32_t REG_CHPLCKR   = (0x41F4 << 8) + CREG_BLOCK;
constexpr uint32_t REG_NETLCKR   = (0x41F5 << 8) + CREG_BLOCK;
constexpr uint32_t REG_PHYLCKR   = (0x41F6 << 8) + CREG_BLOCK;
constexpr uint32_t REG_RTR       = (0x4200 << 8) + CREG_BLOCK;
constexpr uint32_t REG_RCR       = (0x4204 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLRTR     = (0x4208 << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLRCR     = (0x420C << 8) + CREG_BLOCK;
constexpr uint32_t REG_SLHOPR    = (0x420F << 8) + CREG_BLOCK;

constexpr uint32_t REG_SN_MR(uint8_t n)      { return (0x0000 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_PSR(uint8_t n)     { return (0x0004 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_CR(uint8_t n)      { return (0x0010 << 8) + SREG_BLOCK(n); }
constexpr uint32_t _SnREG_IR(uint8_t n)      { return (0x0020 << 8) + SREG_BLOCK(n); }
constexpr uint32_t _SnREG_IMR(uint8_t n)     { return (0x0024 << 8) + SREG_BLOCK(n); }
constexpr uint32_t _SnREG_IRCLR(uint8_t n)   { return (0x0028 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_SR(uint8_t n)      { return (0x0030 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_ESR(uint8_t n)     { return (0x0031 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_PNR(uint8_t n)     { return (0x0100 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_NHR(uint8_t n)     { return REG_SN_PNR(n); }
constexpr uint32_t REG_SN_TOSR(uint8_t n)    { return (0x0104 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_TTLR(uint8_t n)    { return (0x0108 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_HOPR(uint8_t n)    { return REG_SN_TTLR(n); }
constexpr uint32_t REG_SN_FRGR(uint8_t n)    { return (0x010C << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_MSSR(uint8_t n)    { return (0x0110 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_PORTR(uint8_t n)   { return (0x0114 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_DHAR(uint8_t n)    { return (0x0118 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_DIPR(uint8_t n)    { return (0x0120 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_DIP4R(uint8_t n)   { return REG_SN_DIPR(n); }
constexpr uint32_t REG_SN_DIP6R(uint8_t n)   { return (0x0130 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_DPORTR(uint8_t n)  { return (0x0140 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_MR2(uint8_t n)     { return (0x0144 << 8) + SREG_BLOCK(n); }
constexpr uint32_t _SnREG_RTR(uint8_t n)     { return (0x0180 << 8) + SREG_BLOCK(n); }
constexpr uint32_t _SnREG_RCR(uint8_t n)     { return (0x0184 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_KPALVTR(uint8_t n) { return (0x0188 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_TX_BSR(uint8_t n)  { return (0x0200 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_TX_FSR(uint8_t n)  { return (0x0204 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_TX_RD(uint8_t n)   { return (0x0208 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_TX_WR(uint8_t n)   { return (0x020C << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_RX_BSR(uint8_t n)  { return (0x0220 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_RX_RSR(uint8_t n)  { return (0x0224 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_RX_RD(uint8_t n)   { return (0x0228 << 8) + SREG_BLOCK(n); }
constexpr uint32_t REG_SN_RX_WR(uint8_t n)   { return (0x022C << 8) + SREG_BLOCK(n); }

constexpr uint8_t SYSR_CHPL            = 1 << 7;
constexpr uint8_t SYSR_NETL            = 1 << 6;
constexpr uint8_t SYSR_PHYL            = 1 << 5;
constexpr uint8_t SYSR_IND             = 1 << 5;
constexpr uint8_t SYSR_SPI             = 1 << 0;
constexpr uint8_t SYCR0_RST            = 0x00;
constexpr uint8_t SYCR1_IEN            = 1 << 7;
constexpr uint8_t SYCR1_CLKSEL         = 1 << 0;
constexpr uint8_t SYCR1_CLKSEL_25M     = 1;
constexpr uint8_t SYCR1_CLKSEL_100M    = 0;
constexpr uint8_t IR_WOL               = 1 << 7;
constexpr uint8_t IR_UNR6              = 1 << 4;
constexpr uint8_t IR_IPCONF            = 1 << 2;
constexpr uint8_t IR_UNR4              = 1 << 1;
constexpr uint8_t IR_PTERM             = 1 << 0;
constexpr uint8_t SIR_INT(uint8_t n)   { return 1 << n; }
constexpr uint8_t SLIR_TOUT            = 1 << 7;
constexpr uint8_t SLIR_ARP4            = 1 << 6;
constexpr uint8_t SLIR_PING4           = 1 << 5;
constexpr uint8_t SLIR_ARP6            = 1 << 4;
constexpr uint8_t SLIR_PING6           = 1 << 3;
constexpr uint8_t SLIR_NS              = 1 << 2;
constexpr uint8_t SLIR_RS              = 1 << 1;
constexpr uint8_t SLIR_RA              = 1 << 0;
constexpr uint8_t PSR_AUTO             = 0x00;
constexpr uint8_t PSR_LLA              = 0x02;
constexpr uint8_t PSR_GUA              = 0x03;
constexpr uint8_t SLCR_ARP4            = 1 << 6;
constexpr uint8_t SLCR_PING4           = 1 << 5;
constexpr uint8_t SLCR_ARP6            = 1 << 4;
constexpr uint8_t SLCR_PING6           = 1 << 3;
constexpr uint8_t SLCR_NS              = 1 << 2;
constexpr uint8_t SLCR_RS              = 1 << 1;
constexpr uint8_t SLCR_UNA             = 1 << 0;
constexpr uint8_t PHYSR_CAB            = 1 << 7;
constexpr uint8_t PHYSR_CAB_OFF        = 1 << 7;
constexpr uint8_t PHYSR_CAB_ON         = 0 << 7;
constexpr uint8_t PHYSR_MODE           = 7 << 3;
constexpr uint8_t PHYSR_MODE_AUTO      = 0 << 3;
constexpr uint8_t PHYSR_MODE_100F      = 4 << 3;
constexpr uint8_t PHYSR_MODE_100H      = 5 << 3;
constexpr uint8_t PHYSR_MODE_10F       = 6 << 3;
constexpr uint8_t PHYSR_MODE_10H       = 7 << 3;
constexpr uint8_t PHYSR_DPX            = 1 << 2;
constexpr uint8_t PHYSR_DPX_HALF       = 1 << 2;
constexpr uint8_t PHYSR_DPX_FULL       = 0 << 2;
constexpr uint8_t PHYSR_SPD            = 1 << 1;
constexpr uint8_t PHYSR_SPD_10M        = 1 << 1;
constexpr uint8_t PHYSR_SPD_100M       = 0 << 1;
constexpr uint8_t PHYSR_LNK            = 1 << 0;
constexpr uint8_t PHYSR_LNK_UP         = 1 << 0;
constexpr uint8_t PHYSR_LNK_DOWN       = 0 << 0;
constexpr uint8_t PHYACR_READ          = 0x02;
constexpr uint8_t PHYACR_WRITE         = 0x01;
constexpr uint8_t PHYDIVR_32           = 0x00;
constexpr uint8_t PHYDIVR_64           = 0x01;
constexpr uint8_t PHYDIVR_128          = 0xFF;
constexpr uint8_t PHYCR0_AUTO          = 0x00;
constexpr uint8_t PHYCR0_100F          = 0x04;
constexpr uint8_t PHYCR0_100H          = 0x05;
constexpr uint8_t PHYCR0_10F           = 0x06;
constexpr uint8_t PHYCR0_10H           = 0x07;
constexpr uint8_t PHYCR1_PWDN          = 1 << 5;
constexpr uint8_t PHYCR1_TE            = 1 << 3;
constexpr uint8_t PHYCR1_RST           = 1 << 0;
constexpr uint8_t NETxMR_UNRB          = 1 << 3;
constexpr uint8_t NETxMR_PARP          = 1 << 2;
constexpr uint8_t NETxMR_RSTB          = 1 << 1;
constexpr uint8_t NETxMR_PB            = 1 << 0;
constexpr uint8_t NETMR_ANB            = 1 << 5;
constexpr uint8_t NETMR_M6B            = 1 << 4;
constexpr uint8_t NETMR_WOL            = 1 << 2;
constexpr uint8_t NETMR_IP6B           = 1 << 1;
constexpr uint8_t NETMR_IP4B           = 1 << 0;
constexpr uint8_t NETMR2_DHAS          = 1 << 7;
constexpr uint8_t NETMR2_DHAS_ARP      = 1 << 7;
constexpr uint8_t NETMR2_DHAS_ETH      = 0 << 7;
constexpr uint8_t NETMR2_PPPoE         = 1 << 0;
constexpr uint8_t ICMP6BLKR_PING6      = 1 << 4;
constexpr uint8_t ICMP6BLKR_MLD        = 1 << 3;
constexpr uint8_t ICMP6BLKR_RA         = 1 << 2;
constexpr uint8_t ICMP6BLKR_NA         = 1 << 1;
constexpr uint8_t ICMP6BLKR_NS         = 1 << 0;
constexpr uint8_t Sn_MR_MULTI          = 1 << 7;
constexpr uint8_t Sn_MR_MF             = 1 << 7;
constexpr uint8_t Sn_MR_BRDB           = 1 << 6;
constexpr uint8_t Sn_MR_FPSH           = 1 << 6;
constexpr uint8_t Sn_MR_ND             = 1 << 5;
constexpr uint8_t Sn_MR_MC             = 1 << 5;
constexpr uint8_t Sn_MR_SMB            = 1 << 5;
constexpr uint8_t Sn_MR_MMB            = 1 << 5;
constexpr uint8_t Sn_MR_MMB4           = Sn_MR_MMB;
constexpr uint8_t Sn_MR_UNIB           = 1 << 4;
constexpr uint8_t Sn_MR_MMB6           = 1 << 4;
constexpr uint8_t Sn_MR_CLOSE          = 0x00;
constexpr uint8_t Sn_MR_TCP            = 0x01;
constexpr uint8_t Sn_MR_TCP4           = Sn_MR_TCP;
constexpr uint8_t Sn_MR_UDP            = 0x02;
constexpr uint8_t Sn_MR_UDP4           = Sn_MR_UDP;
constexpr uint8_t Sn_MR_IPRAW          = 0x03;
constexpr uint8_t Sn_MR_IPRAW4         = Sn_MR_IPRAW;
constexpr uint8_t Sn_MR_MACRAW         = 0x07;
constexpr uint8_t Sn_MR_TCP6           = 0x09;
constexpr uint8_t Sn_MR_UDP6           = 0x0A;
constexpr uint8_t Sn_MR_IPRAW6         = 0x0B;
constexpr uint8_t Sn_MR_TCPD           = 0x0D;
constexpr uint8_t Sn_MR_UDPD           = 0x0E;
constexpr uint8_t Sn_CR_OPEN           = 0x01;
constexpr uint8_t Sn_CR_LISTEN         = 0x02;
constexpr uint8_t Sn_CR_CONNECT        = 0x04;
constexpr uint8_t Sn_CR_CONNECT6       = 0x84;
constexpr uint8_t Sn_CR_DISCON         = 0x08;
constexpr uint8_t Sn_CR_CLOSE          = 0x10;
constexpr uint8_t Sn_CR_SEND           = 0x20;
constexpr uint8_t Sn_CR_SEND6          = 0xA0;
constexpr uint8_t Sn_CR_SEND_KEEP      = 0x22;
constexpr uint8_t Sn_CR_RECV           = 0x40;
constexpr uint8_t SnREG_IRSENDOK         = 0x10;
constexpr uint8_t SnREG_IRTIMEOUT        = 0x08;
constexpr uint8_t SnREG_IRRECV           = 0x04;
constexpr uint8_t SnREG_IRDISCON         = 0x02;
constexpr uint8_t SnREG_IRCON            = 0x01;
constexpr uint8_t SOCK_CLOSED          = 0x00;
constexpr uint8_t SOCK_INIT            = 0x13;
constexpr uint8_t SOCK_LISTEN          = 0x14;
constexpr uint8_t SOCK_SYNSENT         = 0x15;
constexpr uint8_t SOCK_SYNRECV         = 0x16;
constexpr uint8_t SOCK_ESTABLISHED     = 0x17;
constexpr uint8_t SOCK_FIN_WAIT        = 0x18;
constexpr uint8_t SOCK_TIME_WAIT       = 0x1B;
constexpr uint8_t SOCK_CLOSE_WAIT      = 0x1C;
constexpr uint8_t SOCK_LAST_ACK        = 0x1D;
constexpr uint8_t SOCK_UDP             = 0x22;
constexpr uint8_t SOCK_IPRAW4          = 0x32;
constexpr uint8_t SOCK_IPRAW           = SOCK_IPRAW4;
constexpr uint8_t SOCK_IPRAW6          = 0x33;
constexpr uint8_t SOCK_MACRAW          = 0x42;
constexpr uint8_t Sn_ESR_TCPM          = 1 << 2;
constexpr uint8_t Sn_ESR_TCPM_IPV4     = 0 << 2;
constexpr uint8_t Sn_ESR_TCPM_IPV6     = 1 << 2;
constexpr uint8_t Sn_ESR_TCPOP         = 1 << 1;
constexpr uint8_t Sn_ESR_TCPOP_SVR     = 0 << 1;
constexpr uint8_t Sn_ESR_TCPOP_CLT     = 1 << 1;
constexpr uint8_t Sn_ESR_IP6T          = 1 << 0;
constexpr uint8_t Sn_ESR_IP6T_LLA      = 0 << 0;
constexpr uint8_t Sn_ESR_IP6T_GUA      = 1 << 0;
constexpr uint8_t Sn_MR2_DHAM          = 1 << 1;
constexpr uint8_t Sn_MR2_DHAM_AUTO     = 0 << 1;
constexpr uint8_t Sn_MR2_DHAM_MANUAL   = 1 << 1;
constexpr uint8_t Sn_MR2_FARP          = 1 << 0;
constexpr uint8_t PHYRAR_BMCR          = 0x00;
constexpr uint8_t PHYRAR_BMSR          = 0x01;
constexpr uint16_t BMCR_RST            = 1 << 15;
constexpr uint16_t BMCR_LB             = 1 << 14;
constexpr uint16_t BMCR_SPD            = 1 << 13;
constexpr uint16_t BMCR_ANE            = 1 << 12;
constexpr uint16_t BMCR_PWDN           = 1 << 11;
constexpr uint16_t BMCR_ISOL           = 1 << 10;
constexpr uint16_t BMCR_REAN           = 1 << 9;
constexpr uint16_t BMCR_DPX            = 1 << 8;
constexpr uint16_t BMCR_COLT           = 1 << 7;
constexpr uint16_t BMSR_100_T4         = 1 << 15;
constexpr uint16_t BMSR_100_FDX        = 1 << 14;
constexpr uint16_t BMSR_100_HDX        = 1 << 13;
constexpr uint16_t BMSR_10_FDX         = 1 << 12;
constexpr uint16_t BMSR_10_HDX         = 1 << 11;
constexpr uint16_t BMSR_MF_SUP         = 1 << 6;
constexpr uint16_t BMSR_AN_COMP        = 1 << 5;
constexpr uint16_t BMSR_REMOTE_FAULT   = 1 << 4;
constexpr uint16_t BMSR_AN_ABILITY     = 1 << 3;
constexpr uint16_t BMSR_LINK_STATUS    = 1 << 2;
constexpr uint16_t BMSR_JABBER_DETECT  = 1 << 1;
constexpr uint16_t BMSR_EXT_CAPA       = 1 << 0;

void cris_enter();
void cris_exit();

uint8_t reg_read(uint32_t AddrSel);
void reg_write(uint32_t AddrSel, uint8_t wb);
void reg_read_buf(uint32_t AddrSel, uint8_t* pBuf, datasize_t len);
void reg_write_buf(uint32_t AddrSel, uint8_t* pBuf, datasize_t len);
uint16_t get_sn_tx_fsr(uint8_t sn);
uint16_t get_sn_rx_rsr(uint8_t sn);

inline uint8_t get_rtl() { return reg_read(REG_RTL); }
inline uint16_t get_cidr() { return (((uint16_t)reg_read(REG_CIDR) | (((reg_read(REG_RTL)) & 0x0F) << 1)) << 8) + reg_read(offset_inc(REG_CIDR, 1)); }
inline uint16_t get_ver() { return (((uint16_t)reg_read(REG_VER)) << 8) + reg_read(offset_inc(REG_VER, 1)); }
inline uint8_t get_sysr() { return reg_read(REG_SYSR); }
inline uint8_t get_sycr0() { return reg_read(REG_SYCR0); }
inline void set_sycr0(uint8_t v) { reg_write(REG_SYCR0, v); }
inline uint8_t get_sycr1() { return reg_read(REG_SYCR1); }
inline void set_sycr1(uint8_t v) { reg_write(REG_SYCR1, v); }
inline uint16_t get_tcntr() { return (((uint16_t)reg_read(REG_TCNTR)) << 8) + reg_read(offset_inc(REG_TCNTR, 1)); }
inline void set_tcntrclr(uint8_t v) { reg_write(REG_TCNTRCLR, v); }
inline uint8_t get_ir() { return reg_read(REG_IR); }
inline uint8_t get_sir() { return reg_read(REG_SIR); }
inline uint8_t get_slir() { return reg_read(REG_SLIR); }
inline void set_imr(uint8_t v) { reg_write(REG_IMR, v); }
inline uint8_t get_imr() { return reg_read(REG_IMR); }
inline void set_irclr(uint8_t v) { reg_write(REG_IRCLR, v); }
inline void set_ir(uint8_t v) { set_irclr(v); }
inline void set_simr(uint8_t v) { reg_write(REG_SIMR, v); }
inline uint8_t get_simr() { return reg_read(REG_SIMR); }
inline void set_slimr(uint8_t v) { reg_write(REG_SLIMR, v); }
inline uint8_t get_slimr() { return reg_read(REG_SLIMR); }
inline void set_slirclr(uint8_t v) { reg_write(REG_SLIRCLR, v); }
inline void set_slir(uint8_t v) { set_slirclr(v); }
inline void set_slpsr(uint8_t v) { reg_write(REG_SLPSR, v); }
inline uint8_t get_slpsr() { return reg_read(REG_SLPSR); }
inline void set_slcr(uint8_t v) { reg_write(REG_SLCR, v); }
inline uint8_t get_slcr() { return reg_read(REG_SLCR); }
inline uint8_t get_physr() { return reg_read(REG_PHYSR); }
inline void set_phyrar(uint8_t v) { reg_write(REG_PHYRAR, v); }
inline uint8_t get_phyrar() { return reg_read(REG_PHYRAR); }
inline void set_phydir(uint16_t v) {
    reg_write(offset_inc(REG_PHYDIR, 1), (uint8_t)(v >> 8));
    reg_write(REG_PHYDIR, (uint8_t)v);
}
inline uint16_t get_phydor() { return (((uint16_t)reg_read(offset_inc(REG_PHYDOR, 1))) << 8) + reg_read(REG_PHYDOR); }
inline void set_phyacr(uint8_t v) { reg_write(REG_PHYACR, v); }
inline uint8_t get_phyacr() { return reg_read(REG_PHYACR); }
inline void set_phydivr(uint8_t v) { reg_write(REG_PHYDIVR, v); }
inline uint8_t get_phydivr() { return reg_read(REG_PHYDIVR); }
inline void set_phycr0(uint8_t v) { reg_write(REG_PHYCR0, v); }
inline void set_phycr1(uint8_t v) { reg_write(REG_PHYCR1, v); }
inline uint8_t get_phycr1() { return reg_read(REG_PHYCR1); }
inline void set_net4mr(uint8_t v) { reg_write(REG_NET4MR, v); }
inline void set_net6mr(uint8_t v) { reg_write(REG_NET6MR, v); }
inline void set_netmr(uint8_t v) { reg_write(REG_NETMR, v); }
inline void set_netmr2(uint8_t v) { reg_write(REG_NETMR2, v); }
inline uint8_t get_net4mr() { return reg_read(REG_NET4MR); }
inline uint8_t get_net6mr() { return reg_read(REG_NET6MR); }
inline uint8_t get_netmr() { return reg_read(REG_NETMR); }
inline uint8_t get_netmr2() { return reg_read(REG_NETMR2); }
inline void set_ptmr(uint8_t v) { reg_write(REG_PTMR, v); }
inline uint8_t get_ptmr() { return reg_read(REG_PTMR); }
inline void set_pmnr(uint8_t v) { reg_write(REG_PMNR, v); }
inline uint8_t get_pmnr() { return reg_read(REG_PMNR); }
inline void set_phar(uint8_t* v) { reg_write_buf(REG_PHAR, v, 6); }
inline void get_phar(uint8_t* v) { reg_read_buf(REG_PHAR, v, 6); }
inline void set_psidr(uint16_t v) {
    reg_write(REG_PSIDR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_PSIDR, 1), (uint8_t)v);
}
inline uint16_t get_psidr() { return (((uint16_t)reg_read(REG_PSIDR)) << 8) + reg_read(offset_inc(REG_PSIDR, 1)); }
inline void set_pmrur(uint16_t v) {
    reg_write(REG_PMRUR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_PMRUR, 1), (uint8_t)v);
}
inline uint16_t get_pmrur() { return (((uint16_t)reg_read(REG_PMRUR)) << 8) + reg_read(offset_inc(REG_PMRUR, 1)); }
inline void set_shar(uint8_t* v) { reg_write_buf(REG_SHAR, v, 6); }
inline void get_shar(uint8_t* v) { reg_read_buf(REG_SHAR, v, 6); }
inline void set_gar(uint8_t* v) { reg_write_buf(REG_GAR, v, 4); }
inline void get_gar(uint8_t* v) { reg_read_buf(REG_GAR, v, 4); }
inline void set_ga4r(uint8_t* v) { set_gar(v); }
inline void get_ga4r(uint8_t* v) { get_gar(v); }
inline void set_subr(uint8_t* v) { reg_write_buf(REG_SUBR, v, 4); }
inline void get_subr(uint8_t* v) { reg_read_buf(REG_SUBR, v, 4); }
inline void set_sub4r(uint8_t* v) { set_subr(v); }
inline void get_sub4r(uint8_t* v) { get_subr(v); }
inline void set_sipr(uint8_t* v) { reg_write_buf(REG_SIPR, v, 4); }
inline void get_sipr(uint8_t* v) { reg_read_buf(REG_SIPR, v, 4); }
inline void set_llar(uint8_t* v) { reg_write_buf(REG_LLAR, v, 16); }
inline void get_llar(uint8_t* v) { reg_read_buf(REG_LLAR, v, 16); }
inline void set_guar(uint8_t* v) { reg_write_buf(REG_GUAR, v, 16); }
inline void get_guar(uint8_t* v) { reg_read_buf(REG_GUAR, v, 16); }
inline void set_sub6r(uint8_t* v) { reg_write_buf(REG_SUB6R, v, 16); }
inline void get_sub6r(uint8_t* v) { reg_read_buf(REG_SUB6R, v, 16); }
inline void set_ga6r(uint8_t* v) { reg_write_buf(REG_GA6R, v, 16); }
inline void get_ga6r(uint8_t* v) { reg_read_buf(REG_GA6R, v, 16); }
inline void set_sldipr(uint8_t* v) { reg_write_buf(REG_SLDIPR, v, 4); }
inline void set_sldip4r(uint8_t* v) { set_sldipr(v); }
inline void get_sldipr(uint8_t* v) { reg_read_buf(REG_SLDIPR, v, 4); }
inline void get_sldip4r(uint8_t* v) { get_sldipr(v); }
inline void set_sldip6r(uint8_t* v) { reg_write_buf(REG_SLDIP6R, v, 16); }
inline void get_sldip6r(uint8_t* v) { reg_read_buf(REG_SLDIP6R, v, 16); }
inline void get_sldhar(uint8_t* v) { reg_read_buf(REG_SLDHAR, v, 6); }
inline void set_pingidr(uint16_t v) {
    reg_write(REG_PINGIDR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_PINGIDR, 1), (uint8_t)v);
}
inline uint16_t get_pingidr() { return ((uint16_t)(reg_read(REG_PINGIDR) << 8)) + reg_read(offset_inc(REG_PINGIDR, 1)); }
inline void set_pingseqr(uint16_t v) {
    reg_write(REG_PINGSEQR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_PINGSEQR, 1), (uint8_t)v);
}
inline uint16_t get_pingseqr() { return ((uint16_t)(reg_read(REG_PINGSEQR) << 8)) + reg_read(offset_inc(REG_PINGSEQR, 1)); }
inline void get_uipr(uint8_t* v) { reg_read_buf(REG_UIPR, v, 4); }
inline void get_uip4r(uint8_t* v) { get_uipr(v); }
inline uint16_t get_uportr() { return (((uint16_t)reg_read(REG_UPORTR)) << 8) + reg_read(offset_inc(REG_UPORTR, 1)); }
inline uint16_t get_uport4r() { return get_uportr(); }
inline void get_uip6r(uint8_t* v) { reg_read_buf(REG_UIP6R, v, 16); }
inline uint16_t get_uport6r() { return (((uint16_t)reg_read(REG_UPORT6R)) << 8) + reg_read(offset_inc(REG_UPORT6R, 1)); }
inline void set_intptmr(uint16_t v) {
    reg_write(REG_INTPTMR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_INTPTMR, 1), (uint8_t)v);
}
inline uint16_t get_intptmr() { return (((uint16_t)reg_read(REG_INTPTMR)) << 8) + reg_read(offset_inc(REG_INTPTMR, 1)); }
inline uint8_t get_plr() { return reg_read(REG_PLR); }
inline uint8_t get_pfr() { return reg_read(REG_PFR); }
inline uint32_t get_vltr() {
    return (((uint32_t)reg_read(REG_VLTR)) << 24) +
           (((uint32_t)reg_read(offset_inc(REG_VLTR, 1))) << 16) +
           (((uint32_t)reg_read(offset_inc(REG_VLTR, 2))) << 8) +
            ((uint32_t)reg_read(offset_inc(REG_VLTR, 3)));
}
inline uint32_t get_pltr() {
    return (((uint32_t)reg_read(REG_PLTR)) << 24) +
           (((uint32_t)reg_read(offset_inc(REG_PLTR, 1))) << 16) +
           (((uint32_t)reg_read(offset_inc(REG_PLTR, 2))) << 8) +
            ((uint32_t)reg_read(offset_inc(REG_PLTR, 3)));
}
inline void get_par(uint8_t* v) { reg_read_buf(REG_PAR, v, 16); }
inline void set_icmp6blkr(uint8_t v) { reg_write(REG_ICMP6BLKR, v); }
inline uint8_t get_icmp6blkr() { return reg_read(REG_ICMP6BLKR); }
inline void set_chplckr(uint8_t v) { reg_write(REG_CHPLCKR, v); }
inline uint8_t get_chplckr() { return (get_sysr() & SYSR_CHPL) >> 7; }
inline void chip_lock() { set_chplckr(0xFF); }
inline void chip_unlock() { set_chplckr(0xCE); }
inline void set_netlckr(uint8_t v) { reg_write(REG_NETLCKR, v); }
inline uint8_t get_netlckr() { return (get_sysr() & SYSR_NETL) >> 6; }
inline void net_lock() { set_netlckr(0xC5); }
inline void net_unlock() { set_netlckr(0x3A); }
inline void set_phylckr(uint8_t v) { reg_write(REG_PHYLCKR, v); }
inline uint8_t get_phylckr() { return (get_sysr() & SYSR_PHYL) >> 5; }
inline void phy_lock() { set_phylckr(0xFF); }
inline void phy_unlock() { set_phylckr(0x53); }
inline void set_rtr(uint16_t v) {
    reg_write(REG_RTR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_RTR, 1), (uint8_t)v);
}
inline uint16_t get_rtr() { return (((uint16_t)reg_read(REG_RTR)) << 8) + reg_read(offset_inc(REG_RTR, 1)); }
inline void set_rcr(uint8_t v) { reg_write(REG_RCR, v); }
inline uint8_t get_rcr() { return reg_read(REG_RCR); }
inline void set_slrtr(uint16_t v) {
    reg_write(REG_SLRTR, (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SLRTR, 1), (uint8_t)v);
}
inline uint16_t get_slrtr() { return (((uint16_t)reg_read(REG_SLRTR)) << 8) + reg_read(offset_inc(REG_SLRTR, 1)); }
inline void set_slrcr(uint8_t v) { reg_write(REG_SLRCR, v); }
inline uint8_t get_slrcr() { return reg_read(REG_SLRCR); }
inline void set_slhopr(uint8_t v) { reg_write(REG_SLHOPR, v); }
inline uint8_t get_slhopr() { return reg_read(REG_SLHOPR); }

inline void set_sn_mr(uint8_t sn, uint8_t v) { reg_write(REG_SN_MR(sn), v); }
inline uint8_t get_sn_mr(uint8_t sn) { return reg_read(REG_SN_MR(sn)); }
inline void set_sn_psr(uint8_t sn, uint8_t v) { reg_write(REG_SN_PSR(sn), v); }
inline uint8_t get_sn_psr(uint8_t sn) { return reg_read(REG_SN_PSR(sn)); }
inline void set_sn_cr(uint8_t sn, uint8_t v) { reg_write(REG_SN_CR(sn), v); }
inline uint8_t get_sn_cr(uint8_t sn) { return reg_read(REG_SN_CR(sn)); }
inline uint8_t get_sn_ir(uint8_t sn) { return reg_read(_SnREG_IR(sn)); }
inline void set_sn_imr(uint8_t sn, uint8_t v) { reg_write(_SnREG_IMR(sn), v); }
inline uint8_t get_sn_imr(uint8_t sn) { return reg_read(_SnREG_IMR(sn)); }
inline void set_sn_irclr(uint8_t sn, uint8_t v) { reg_write(_SnREG_IRCLR(sn), v); }
inline void set_sn_ir(uint8_t sn, uint8_t v) { set_sn_irclr(sn, v); }
inline uint8_t get_sn_sr(uint8_t sn) { return reg_read(REG_SN_SR(sn)); }
inline uint8_t get_sn_esr(uint8_t sn) { return reg_read(REG_SN_ESR(sn)); }
inline void set_sn_pnr(uint8_t sn, uint8_t v) { reg_write(REG_SN_PNR(sn), v); }
inline void set_sn_nhr(uint8_t sn, uint8_t v) { set_sn_pnr(sn, v); }
inline uint8_t get_sn_pnr(uint8_t sn) { return reg_read(REG_SN_PNR(sn)); }
inline uint8_t get_sn_nhr(uint8_t sn) { return get_sn_pnr(sn); }
inline void set_sn_tosr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TOSR(sn), v); }
inline uint8_t get_sn_tosr(uint8_t sn) { return reg_read(REG_SN_TOSR(sn)); }
inline uint8_t get_sn_tos(uint8_t sn) { return get_sn_tosr(sn); }
inline void set_sn_tos(uint8_t sn, uint8_t v) { set_sn_tosr(sn, v); }
inline void set_sn_ttlr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TTLR(sn), v); }
inline uint8_t get_sn_ttlr(uint8_t sn) { return reg_read(REG_SN_TTLR(sn)); }
inline void set_sn_ttl(uint8_t sn, uint8_t v) { set_sn_ttlr(sn, v); }
inline uint8_t get_sn_ttl(uint8_t sn) { return get_sn_ttlr(sn); }
inline void set_sn_hopr(uint8_t sn, uint8_t v) { set_sn_ttlr(sn, v); }
inline uint8_t get_sn_hopr(uint8_t sn) { return get_sn_ttlr(sn); }
inline void set_sn_frgr(uint8_t sn, uint16_t v) {
    reg_write(REG_SN_FRGR(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SN_FRGR(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_frgr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_FRGR(sn))) << 8) + reg_read(offset_inc(REG_SN_FRGR(sn), 1)); }
inline void set_sn_mssr(uint8_t sn, uint16_t v) {
    reg_write(REG_SN_MSSR(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SN_MSSR(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_mssr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_MSSR(sn))) << 8) + reg_read(offset_inc(REG_SN_MSSR(sn), 1)); }
inline void set_sn_portr(uint8_t sn, uint16_t v) {
    reg_write(REG_SN_PORTR(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SN_PORTR(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_portr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_PORTR(sn))) << 8) + reg_read(offset_inc(REG_SN_PORTR(sn), 1)); }
inline void set_sn_dhar(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DHAR(sn), v, 6); }
inline void get_sn_dhar(uint8_t sn, uint8_t* v) { reg_read_buf(REG_SN_DHAR(sn), v, 6); }
inline void set_sn_dipr(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DIPR(sn), v, 4); }
inline void get_sn_dipr(uint8_t sn, uint8_t* v) { reg_read_buf(REG_SN_DIPR(sn), v, 4); }
inline void set_sn_dip4r(uint8_t sn, uint8_t* v) { set_sn_dipr(sn, v); }
inline void get_sn_dip4r(uint8_t sn, uint8_t* v) { get_sn_dipr(sn, v); }
inline void set_sn_dip6r(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DIP6R(sn), v, 16); }
inline void get_sn_dip6r(uint8_t sn, uint8_t* v) { reg_read_buf(REG_SN_DIP6R(sn), v, 16); }
inline void set_sn_dportr(uint8_t sn, uint16_t v) {
    reg_write(REG_SN_DPORTR(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SN_DPORTR(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_dportr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_DPORTR(sn))) << 8) + reg_read(offset_inc(REG_SN_DPORTR(sn), 1)); }
inline uint16_t get_sn_dport(uint8_t sn) { return get_sn_dportr(sn); }
inline void set_sn_dport(uint8_t sn, uint16_t v) { set_sn_dportr(sn, v); }
inline void set_sn_mr2(uint8_t sn, uint8_t v) { reg_write(REG_SN_MR2(sn), v); }
inline uint8_t get_sn_mr2(uint8_t sn) { return reg_read(REG_SN_MR2(sn)); }
inline void set_sn_rtr(uint8_t sn, uint16_t v) {
    reg_write(_SnREG_RTR(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(_SnREG_RTR(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_rtr(uint8_t sn) { return (((uint16_t)reg_read(_SnREG_RTR(sn))) << 8) + reg_read(offset_inc(_SnREG_RTR(sn), 1)); }
inline void set_sn_rcr(uint8_t sn, uint8_t v) { reg_write(_SnREG_RCR(sn), v); }
inline uint8_t get_sn_rcr(uint8_t sn) { return reg_read(_SnREG_RCR(sn)); }
inline void set_sn_kpalvtr(uint8_t sn, uint8_t v) { reg_write(REG_SN_KPALVTR(sn), v); }
inline uint8_t get_sn_kpalvtr(uint8_t sn) { return reg_read(REG_SN_KPALVTR(sn)); }
inline void set_sn_tx_bsr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TX_BSR(sn), v); }
inline void set_sn_txbuf_size(uint8_t sn, uint8_t v) { set_sn_tx_bsr(sn, v); }
inline uint8_t get_sn_tx_bsr(uint8_t sn) { return reg_read(REG_SN_TX_BSR(sn)); }
inline uint8_t get_sn_txbuf_size(uint8_t sn) { return get_sn_tx_bsr(sn); }
inline uint16_t get_sn_tx_max(uint8_t sn) { return get_sn_tx_bsr(sn) << 10; }

inline uint16_t get_sn_tx_rd(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_TX_RD(sn))) << 8) + reg_read(offset_inc(REG_SN_TX_RD(sn), 1)); }
inline void set_sn_tx_wr(uint8_t sn, uint16_t v) {
    reg_write(REG_SN_TX_WR(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SN_TX_WR(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_tx_wr(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_TX_WR(sn)) << 8) + reg_read(offset_inc(REG_SN_TX_WR(sn), 1)); }
inline void set_sn_rx_bsr(uint8_t sn, uint8_t v) { reg_write(REG_SN_RX_BSR(sn), v); }
inline void set_sn_rxbuf_size(uint8_t sn, uint8_t v) { set_sn_rx_bsr(sn, v); }
inline uint8_t get_sn_rx_bsr(uint8_t sn) { return reg_read(REG_SN_RX_BSR(sn)); }
inline uint8_t get_sn_rxbuf_size(uint8_t sn) { return get_sn_rx_bsr(sn); }
inline uint16_t get_sn_rx_max(uint8_t sn) { return get_sn_rx_bsr(sn) << 10; }

inline void set_sn_rx_rd(uint8_t sn, uint16_t v) {
    reg_write(REG_SN_RX_RD(sn), (uint8_t)(v >> 8));
    reg_write(offset_inc(REG_SN_RX_RD(sn), 1), (uint8_t)v);
}
inline uint16_t get_sn_rx_rd(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_RX_RD(sn)) << 8) + reg_read(offset_inc(REG_SN_RX_RD(sn), 1)); }
inline uint16_t get_sn_rx_wr(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_RX_WR(sn)) << 8) + reg_read(offset_inc(REG_SN_RX_WR(sn), 1)); }
static critical_section_t g_cris_sec;

void cris_enter() {
    critical_section_enter_blocking(&g_cris_sec);
}

void cris_exit() {
    critical_section_exit(&g_cris_sec);
}

static uint8_t make_opcode(uint32_t addr, uint8_t rw) {
    return static_cast<uint8_t>((addr & 0xFF) | rw | QSPI_MODE);
}

static uint16_t make_addr(uint32_t addr) {
    return static_cast<uint16_t>((addr & 0x00FFFF00) >> 8);
}

void reg_write(uint32_t AddrSel, uint8_t wb) {
    cris_enter();
    pio_frame_start();
    pio_write(make_opcode(AddrSel, SPI_WRITE), make_addr(AddrSel), &wb, 1);
    pio_frame_end();
    cris_exit();
}

uint8_t reg_read(uint32_t AddrSel) {
    uint8_t ret[2] = {0};
    cris_enter();
    pio_frame_start();
    pio_read(make_opcode(AddrSel, SPI_READ), make_addr(AddrSel), ret, 1);
    pio_frame_end();
    cris_exit();
    return ret[0];
}

void reg_write_buf(uint32_t AddrSel, uint8_t* pBuf, datasize_t len) {
    cris_enter();
    pio_frame_start();
    pio_write(make_opcode(AddrSel, SPI_WRITE), make_addr(AddrSel), pBuf, len);
    pio_frame_end();
    cris_exit();
}

void reg_read_buf(uint32_t AddrSel, uint8_t* pBuf, datasize_t len) {
    cris_enter();
    pio_frame_start();
    pio_read(make_opcode(AddrSel, SPI_READ), make_addr(AddrSel), pBuf, len);
    pio_frame_end();
    cris_exit();
}

uint16_t get_sn_tx_fsr(uint8_t sn) {
    uint16_t prev_val = -1, val = 0;
    do {
        prev_val = val;
        val = reg_read(REG_SN_TX_FSR(sn));
        val = (val << 8) + reg_read(offset_inc(REG_SN_TX_FSR(sn), 1));
    } while (val != prev_val);
    return val;
}

uint16_t get_sn_rx_rsr(uint8_t sn) {
    uint16_t prev_val = -1, val = 0;
    do {
        prev_val = val;
        val = reg_read(REG_SN_RX_RSR(sn));
        val = (val << 8) + reg_read(offset_inc(REG_SN_RX_RSR(sn), 1));
    } while (val != prev_val);
    return val;
}

void send_data(uint8_t sn, uint8_t *data, uint16_t len) {
    uint16_t ptr = get_sn_tx_wr(sn);
    uint32_t addrsel = ((uint32_t)ptr << 8) + TXBUF_BLOCK(sn);
    reg_write_buf(addrsel, data, len);
    ptr += len;
    set_sn_tx_wr(sn, ptr);
}

void recv_data(uint8_t sn, uint8_t *data, uint16_t len) {
    if (len == 0) return;
    uint16_t ptr = get_sn_rx_rd(sn);
    uint32_t addrsel = ((uint32_t)ptr << 8) + RXBUF_BLOCK(sn);
    reg_read_buf(addrsel, data, len);
    ptr += len;
    set_sn_rx_rd(sn, ptr);
}

void recv_ignore(uint8_t sn, uint16_t len) {
    set_sn_rx_rd(sn, get_sn_rx_rd(sn) + len);
}


void mdio_write(uint8_t phyregaddr, uint16_t var) {
    set_phyrar(phyregaddr);
    set_phydir(var);
    set_phyacr(PHYACR_WRITE);
    while (get_phyacr());
}

uint16_t mdio_read(uint8_t phyregaddr) {
    set_phyrar(phyregaddr);
    set_phyacr(PHYACR_READ);
    while (get_phyacr());
    return get_phydor();
}

} // namespace

static uint8_t dns_[4];
static uint8_t dns6_[16];
static ipconf_mode ipmode_;

static constexpr char CHIP_ID[] = "W6300";


void soft_reset() {
    uint8_t gw[4], sn[4], sip[4], mac[6];
    uint8_t gw6[16], sn6[16], lla[16], gua[16];
    uint8_t islock = get_sysr();

    chip_unlock();
    get_shar(mac); get_gar(gw); get_subr(sn); get_sipr(sip);
    get_ga6r(gw6); get_sub6r(sn6); get_llar(lla); get_guar(gua);
    set_sycr0(SYCR0_RST);
    get_sycr0();

    net_unlock();
    set_shar(mac); set_gar(gw); set_subr(sn); set_sipr(sip);
    set_ga6r(gw6); set_sub6r(sn6); set_llar(lla); set_guar(gua);

    if (islock & SYSR_CHPL) chip_lock();
    if (islock & SYSR_NETL) net_lock();
}

int8_t init_buffers(std::span<const uint8_t> txsize, std::span<const uint8_t> rxsize) {
    soft_reset();
    if (!txsize.empty()) {
        int8_t tmp = 0;
        for (int i = 0; i < SOCK_COUNT; i++) {
            tmp += txsize[i];
            if (tmp > 32) return -1;
        }
        for (int i = 0; i < SOCK_COUNT; i++) set_sn_txbuf_size(i, txsize[i]);
    }
    if (!rxsize.empty()) {
        int8_t tmp = 0;
        for (int i = 0; i < SOCK_COUNT; i++) {
            tmp += rxsize[i];
            if (tmp > 32) return -1;
        }
        for (int i = 0; i < SOCK_COUNT; i++) set_sn_rxbuf_size(i, rxsize[i]);
    }
    return 0;
}

void clear_interrupt(intr_kind intr) {
    set_irclr((uint8_t)intr);
    uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
    for (int i = 0; i < SOCK_COUNT; i++)
        if (sir & (1 << i)) set_sn_irclr(i, 0xFF);
    set_slirclr((uint8_t)((uint32_t)intr >> 16));
}

intr_kind get_interrupt() {
    uint32_t ret = get_sir();
    ret = (ret << 8) + get_ir();
    ret = (((uint32_t)get_slir()) << 16) | ret;
    return (intr_kind)ret;
}

void set_interrupt_mask(intr_kind intr) {
    set_imr((uint8_t)intr);
    set_simr((uint8_t)((uint16_t)intr >> 8));
    set_slimr((uint8_t)((uint32_t)intr >> 16));
}

intr_kind get_interrupt_mask() {
    uint32_t ret = get_simr();
    ret = (ret << 8) + get_imr();
    ret = (((uint32_t)get_slimr()) << 16) | ret;
    return (intr_kind)ret;
}

int8_t get_phy_link() {
    if (mdio_read(PHYRAR_BMSR) & BMSR_LINK_STATUS) return PHY_LINK_ON;
    return PHY_LINK_OFF;
}

int8_t get_phy_power_mode() {
    if (mdio_read(PHYRAR_BMCR) & BMCR_PWDN) return PHY_POWER_DOWN;
    return PHY_POWER_NORM;
}

void reset_phy() {
    mdio_write(PHYRAR_BMCR, mdio_read(PHYRAR_BMCR) | BMCR_RST);
    while (mdio_read(PHYRAR_BMCR) & BMCR_RST);
}

void set_phy_conf(const phy_conf& phyconf) {
    uint16_t tmp = mdio_read(PHYRAR_BMCR);
    if (phyconf.mode == PHY_MODE_TE) {
        set_phycr1(get_phycr1() | PHYCR1_TE);
        set_phycr0(PHYCR0_AUTO);
    } else {
        set_phycr1(get_phycr1() & ~PHYCR1_TE);
        if (phyconf.mode == PHY_MODE_AUTONEGO) {
            tmp |= BMCR_ANE;
        } else {
            tmp &= ~(BMCR_ANE | BMCR_DPX | BMCR_SPD);
            if (phyconf.duplex == PHY_DUPLEX_FULL) tmp |= BMCR_DPX;
            if (phyconf.speed == PHY_SPEED_100) tmp |= BMCR_SPD;
        }
        mdio_write(PHYRAR_BMCR, tmp);
    }
}

phy_conf get_phy_conf() {
    phy_conf result;
    uint16_t tmp = mdio_read(PHYRAR_BMCR);
    result.mode   = (get_phycr1() & PHYCR1_TE) ? PHY_MODE_TE : ((tmp & BMCR_ANE) ? PHY_MODE_AUTONEGO : PHY_MODE_MANUAL);
    result.duplex = (tmp & BMCR_DPX) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
    result.speed  = (tmp & BMCR_SPD) ? PHY_SPEED_100 : PHY_SPEED_10;
    return result;
}

phy_conf get_phy_status() {
    phy_conf result;
    uint8_t tmp = get_physr();
    result.mode   = (get_phycr1() & PHYCR1_TE) ? PHY_MODE_TE : ((tmp & (1 << 5)) ? PHY_MODE_MANUAL : PHY_MODE_AUTONEGO);
    result.speed  = (tmp & PHYSR_SPD) ? PHY_SPEED_10 : PHY_SPEED_100;
    result.duplex = (tmp & PHYSR_DPX) ? PHY_DUPLEX_HALF : PHY_DUPLEX_FULL;
    return result;
}

void set_phy_power_mode(uint8_t pmode) {
    uint16_t tmp = mdio_read(PHYRAR_BMCR);
    if (pmode == PHY_POWER_DOWN) tmp |= BMCR_PWDN;
    else tmp &= ~BMCR_PWDN;
    mdio_write(PHYRAR_BMCR, tmp);
}

void set_net_info(const net_info& p) {
    set_shar(const_cast<uint8_t*>(p.mac.data())); set_gar(const_cast<uint8_t*>(p.gw.data()));
    set_subr(const_cast<uint8_t*>(p.sn.data())); set_sipr(const_cast<uint8_t*>(p.ip.data()));
    set_ga6r(const_cast<uint8_t*>(p.gw6.data())); set_sub6r(const_cast<uint8_t*>(p.sn6.data()));
    set_llar(const_cast<uint8_t*>(p.lla.data())); set_guar(const_cast<uint8_t*>(p.gua.data()));
    memcpy(dns_, p.dns.data(), 4);
    memcpy(dns6_, p.dns6.data(), 16);
    ipmode_ = p.ipmode;
}

net_info get_net_info() {
    net_info p = {};
    get_shar(p.mac.data()); get_gar(p.gw.data()); get_subr(p.sn.data()); get_sipr(p.ip.data());
    get_ga6r(p.gw6.data()); get_sub6r(p.sn6.data()); get_llar(p.lla.data()); get_guar(p.gua.data());
    memcpy(p.dns.data(), dns_, 4);
    memcpy(p.dns6.data(), dns6_, 16);
    p.ipmode = ipmode_;
    return p;
}

void set_net_mode(netmode_type netmode) {
    uint32_t tmp = (uint32_t)netmode;
    set_netmr((uint8_t)tmp);
    set_netmr2((uint8_t)(tmp >> 8));
    set_net4mr((uint8_t)(tmp >> 16));
    set_net6mr((uint8_t)(tmp >> 24));
}

netmode_type get_net_mode() {
    uint32_t ret = get_netmr();
    ret = (ret << 8) + get_netmr2();
    ret = (ret << 16) + get_net4mr();
    ret = (ret << 24) + get_net6mr();
    return (netmode_type)ret;
}

void set_timeout(const net_timeout& t) {
    set_rcr(t.s_retry_cnt); set_rtr(t.s_time_100us);
    set_slrcr(t.sl_retry_cnt); set_slrtr(t.sl_time_100us);
}

net_timeout get_timeout() {
    return {get_rcr(), get_rtr(), get_slrcr(), get_slrtr()};
}

int8_t send_arp(arp_request& arp) {
    uint8_t tmp;
    if (arp.destinfo.len == 16) { set_sldip6r(const_cast<uint8_t*>(arp.destinfo.ip.data())); set_slcr(SLCR_ARP6); }
    else { set_sldip4r(const_cast<uint8_t*>(arp.destinfo.ip.data())); set_slcr(SLCR_ARP4); }
    while (get_slcr());
    while ((tmp = get_slir()) == 0x00);
    set_slirclr(~SLIR_RA);
    if (tmp & (SLIR_ARP4 | SLIR_ARP6)) { get_sldhar(arp.dha.data()); return 0; }
    return -1;
}

int8_t send_ping(const ping_request& ping) {
    uint8_t tmp;
    set_pingidr(ping.id); set_pingseqr(ping.seq);
    if (ping.destinfo.len == 16) { set_sldip6r(const_cast<uint8_t*>(ping.destinfo.ip.data())); set_slcr(SLCR_PING6); }
    else { set_sldip4r(const_cast<uint8_t*>(ping.destinfo.ip.data())); set_slcr(SLCR_PING4); }
    while (get_slcr());
    while ((tmp = get_slir()) == 0x00);
    set_slirclr(~SLIR_RA);
    if (tmp & (SLIR_PING4 | SLIR_PING6)) return 0;
    return -1;
}

int8_t send_dad(std::span<const uint8_t, 16> ipv6) {
    uint8_t tmp;
    set_sldip6r(const_cast<uint8_t*>(ipv6.data())); set_slcr(SLCR_NS);
    while (get_slcr());
    while ((tmp = get_slir()) == 0x00);
    set_slirclr(~SLIR_RA);
    if (tmp & SLIR_TOUT) return 0;
    return -1;
}

int8_t send_slaac(prefix& pfx) {
    uint8_t tmp;
    set_slcr(SLCR_RS);
    while (get_slcr());
    while ((tmp = get_slir()) == 0x00);
    set_slirclr(~SLIR_RA);
    if (tmp & SLIR_RS) {
        pfx.len = get_plr(); pfx.flag = get_pfr();
        pfx.valid_lifetime = get_vltr(); pfx.preferred_lifetime = get_pltr();
        get_par(pfx.prefix.data());
        return 0;
    }
    return -1;
}

int8_t send_unsolicited() {
    uint8_t tmp;
    set_slcr(SLCR_UNA);
    while (get_slcr());
    while ((tmp = get_slir()) == 0x00);
    set_slirclr(~SLIR_RA);
    if (tmp & SLIR_TOUT) return 0;
    return -1;
}

int8_t get_prefix(prefix& pfx) {
    if (get_slir() & SLIR_RA) {
        pfx.len = get_plr(); pfx.flag = get_pfr();
        pfx.valid_lifetime = get_vltr(); pfx.preferred_lifetime = get_pltr();
        get_par(pfx.prefix.data());
        set_slirclr(SLIR_RA);
    }
    return -1;
}
constexpr uint16_t SOCK_ANY_PORT_NUM = 0xC000;

static uint16_t sock_any_port = SOCK_ANY_PORT_NUM;
static uint16_t sock_io_mode_bits = 0;
static uint16_t sock_is_sending = 0;
static uint16_t sock_remained_size[SOCK_COUNT] = {0,};
uint8_t sock_pack_info[SOCK_COUNT] = {0,};

#define FAIL(e) return std::unexpected(sock_error::e)
#define CHECK_SOCKNUM()   do { if(sn >= SOCK_COUNT) FAIL(sock_num); } while(0)
#define CHECK_SOCKMODE(mode)  do { if((get_sn_mr(sn) & 0x0F) != mode) FAIL(sock_mode); } while(0)
#define CHECK_TCPMODE()   do { if((get_sn_mr(sn) & 0x03) != 0x01) FAIL(sock_mode); } while(0)
#define CHECK_UDPMODE()   do { if((get_sn_mr(sn) & 0x03) != 0x02) FAIL(sock_mode); } while(0)
#define CHECK_IPMODE()    do { if((get_sn_mr(sn) & 0x07) != 0x03) FAIL(sock_mode); } while(0)
#define CHECK_DGRAMMODE() do { if(get_sn_mr(sn) == Sn_MR_CLOSED) FAIL(sock_mode); if((get_sn_mr(sn) & 0x03) == 0x01) FAIL(sock_mode); } while(0)
#define CHECK_SOCKINIT()  do { if((get_sn_sr(sn) != SOCK_INIT)) FAIL(sock_init); } while(0)
#define CHECK_SOCKDATA()  do { if(len == 0) FAIL(data_len); } while(0)
#define CHECK_IPZERO(addr, addrlen) do { uint16_t ipzero=0; for(uint8_t i=0; i<addrlen; i++) ipzero += (uint16_t)addr[i]; if(ipzero == 0) FAIL(ip_invalid); } while(0)

std::expected<socket_id, sock_error> open_socket(socket_id sid, protocol proto, port_num port, sock_flag flag) {
    uint8_t sn = static_cast<uint8_t>(sid);
    uint16_t p = static_cast<uint16_t>(port);
    uint8_t pr = static_cast<uint8_t>(proto);
    uint8_t fl = static_cast<uint8_t>(flag);
    uint8_t taddr[16];
    CHECK_SOCKNUM();
    switch (pr & 0x0F) {
    case Sn_MR_TCP4:
        get_sipr(taddr);
        CHECK_IPZERO(taddr, 4);
        break;
    case Sn_MR_TCP6:
        get_llar(taddr);
        CHECK_IPZERO(taddr, 16);
        break;
    case Sn_MR_TCPD:
        get_sipr(taddr);
        CHECK_IPZERO(taddr, 4);
        get_llar(taddr);
        CHECK_IPZERO(taddr, 16);
        break;
    case Sn_MR_UDP:
    case Sn_MR_UDP6:
    case Sn_MR_UDPD:
    case Sn_MR_MACRAW:
    case Sn_MR_IPRAW4:
    case Sn_MR_IPRAW6:
        break;
    default:
        FAIL(sock_mode);
    }
    if ((fl & 0x04) != 0) FAIL(sock_flag);

    if (fl != 0) {
        switch (pr) {
        case Sn_MR_MACRAW:
            if ((fl & (Sn_MR2_DHAM | Sn_MR2_FARP)) != 0) FAIL(sock_flag);
            break;
        case Sn_MR_TCP4:
        case Sn_MR_TCP6:
        case Sn_MR_TCPD:
            if ((fl & (Sn_MR_MULTI | Sn_MR_UNIB)) != 0) FAIL(sock_flag);
            break;
        case Sn_MR_IPRAW4:
        case Sn_MR_IPRAW6:
            if (fl != 0) FAIL(sock_flag);
            break;
        default:
            break;
        }
    }
    close(sid);
    set_sn_mr(sn, (pr | (fl & 0xF0)));
    set_sn_mr2(sn, fl & 0x03);
    if (!p) {
        p = sock_any_port++;
        if (sock_any_port == 0xFFF0) sock_any_port = SOCK_ANY_PORT_NUM;
    }
    set_sn_portr(sn, p);
    set_sn_cr(sn, Sn_CR_OPEN);
    while (get_sn_cr(sn));
    sock_io_mode_bits &= ~(1 << sn);
    sock_io_mode_bits |= ((fl & (static_cast<uint8_t>(sock_flag::io_nonblock) >> 3)) << sn);
    sock_is_sending &= ~(1 << sn);
    sock_remained_size[sn] = 0;
    sock_pack_info[sn] = static_cast<uint8_t>(pack_info::completed);
    while (get_sn_sr(sn) == SOCK_CLOSED);
    return sid;
}

std::expected<void, sock_error> close(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    CHECK_SOCKNUM();
    set_sn_cr(sn, Sn_CR_CLOSE);
    while (get_sn_cr(sn));
    set_sn_ir(sn, 0xFF);
    sock_io_mode_bits &= ~(1 << sn);
    sock_is_sending &= ~(1 << sn);
    sock_remained_size[sn] = 0;
    sock_pack_info[sn] = PACK_NONE;
    while (get_sn_sr(sn) != SOCK_CLOSED);
    return {};
}

std::expected<void, sock_error> listen(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    CHECK_SOCKNUM();
    CHECK_TCPMODE();
    CHECK_SOCKINIT();
    set_sn_cr(sn, Sn_CR_LISTEN);
    while (get_sn_cr(sn));
    while (get_sn_sr(sn) != SOCK_LISTEN) {
        close(sid);
        FAIL(sock_closed);
    }
    return {};
}

std::expected<void, sock_error> connect(socket_id sid, const ip_address& addr, port_num port) {
    uint8_t sn = static_cast<uint8_t>(sid);
    uint16_t p = static_cast<uint16_t>(port);
    uint8_t addrlen = addr.len;
    CHECK_SOCKNUM();
    CHECK_TCPMODE();
    CHECK_SOCKINIT();
    CHECK_IPZERO(addr.ip.data(), addrlen);
    if (p == 0) FAIL(port_zero);

    set_sn_dportr(sn, p);
    if (addrlen == 16) {
        if (get_sn_mr(sn) & 0x08) {
            set_sn_dip6r(sn, const_cast<uint8_t*>(addr.ip.data()));
            set_sn_cr(sn, Sn_CR_CONNECT6);
        } else {
            FAIL(sock_mode);
        }
    } else {
        if (get_sn_mr(sn) == Sn_MR_TCP6) FAIL(sock_mode);
        set_sn_dipr(sn, const_cast<uint8_t*>(addr.ip.data()));
        set_sn_cr(sn, Sn_CR_CONNECT);
    }
    while (get_sn_cr(sn));
    if (sock_io_mode_bits & (1 << sn)) FAIL(busy);
    while (get_sn_sr(sn) != SOCK_ESTABLISHED) {
        if (get_sn_ir(sn) & SnREG_IRTIMEOUT) {
            set_sn_ir(sn, SnREG_IRTIMEOUT);
            FAIL(timeout);
        }
        if (get_sn_sr(sn) == SOCK_CLOSED) FAIL(sock_closed);
    }
    return {};
}

std::expected<void, sock_error> disconnect(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    CHECK_SOCKNUM();
    CHECK_TCPMODE();
    if (get_sn_sr(sn) != SOCK_CLOSED) {
        set_sn_cr(sn, Sn_CR_DISCON);
        while (get_sn_cr(sn));
        sock_is_sending &= ~(1 << sn);
        if (sock_io_mode_bits & (1 << sn)) FAIL(busy);
        while (get_sn_sr(sn) != SOCK_CLOSED) {
            if (get_sn_ir(sn) & SnREG_IRTIMEOUT) {
                close(sid);
                FAIL(timeout);
            }
        }
    }
    return {};
}

std::expected<uint16_t, sock_error> send(socket_id sid, std::span<const uint8_t> buf) {
    uint8_t sn = static_cast<uint8_t>(sid);
    uint8_t tmp = 0;
    uint16_t freesize = 0;
    uint16_t len = buf.size();

    freesize = get_sn_tx_max(sn);
    if (len > freesize) len = freesize;
    while (1) {
        freesize = (uint16_t)get_sn_tx_fsr(sn);
        tmp = get_sn_sr(sn);
        if ((tmp != SOCK_ESTABLISHED) && (tmp != SOCK_CLOSE_WAIT)) {
            if (tmp == SOCK_CLOSED) close(sid);
            FAIL(sock_status);
        }
        if ((sock_io_mode_bits & (1 << sn)) && (len > freesize)) FAIL(busy);
        if (len <= freesize) break;
    }
    send_data(sn, const_cast<uint8_t*>(buf.data()), len);
    if (sock_is_sending & (1 << sn)) {
        while (!(get_sn_ir(sn) & SnREG_IRSENDOK)) {
            tmp = get_sn_sr(sn);
            if ((tmp != SOCK_ESTABLISHED) && (tmp != SOCK_CLOSE_WAIT)) {
                if ((tmp == SOCK_CLOSED) || (get_sn_ir(sn) & SnREG_IRTIMEOUT)) close(sid);
                FAIL(sock_status);
            }
            if (sock_io_mode_bits & (1 << sn)) FAIL(busy);
        }
        set_sn_ir(sn, SnREG_IRSENDOK);
    }
    set_sn_cr(sn, Sn_CR_SEND);
    while (get_sn_cr(sn));
    sock_is_sending |= (1 << sn);
    return len;
}

std::expected<uint16_t, sock_error> recv(socket_id sid, std::span<uint8_t> buf) {
    uint8_t sn = static_cast<uint8_t>(sid);
    uint16_t len = buf.size();
    uint8_t tmp = 0;
    uint16_t recvsize = 0;

    CHECK_SOCKNUM();
    CHECK_SOCKMODE(Sn_MR_TCP);
    CHECK_SOCKDATA();

    recvsize = get_sn_rx_max(sn);
    if (recvsize < len) len = recvsize;

    while (1) {
        recvsize = (uint16_t)get_sn_rx_rsr(sn);
        tmp = get_sn_sr(sn);
        if (tmp != SOCK_ESTABLISHED) {
            if (tmp == SOCK_CLOSE_WAIT) {
                if (recvsize != 0) break;
                else if (get_sn_tx_fsr(sn) == get_sn_tx_max(sn)) {
                    close(sid);
                    FAIL(sock_status);
                }
            } else {
                close(sid);
                FAIL(sock_status);
            }
        }
        if (recvsize != 0) break;
        if (sock_io_mode_bits & (1 << sn)) FAIL(busy);
    };

    if (recvsize < len) len = recvsize;
    recv_data(sn, buf.data(), len);
    set_sn_cr(sn, Sn_CR_RECV);
    while (get_sn_cr(sn));
    return len;
}

std::expected<uint16_t, sock_error> sendto(socket_id sid, std::span<const uint8_t> buf, const ip_address& addr, port_num port) {
    uint8_t sn = static_cast<uint8_t>(sid);
    uint16_t p = static_cast<uint16_t>(port);
    uint16_t len = buf.size();
    uint8_t addrlen = addr.len;
    uint8_t tmp = 0;
    uint8_t tcmd = Sn_CR_SEND;
    uint16_t freesize = 0;

    CHECK_SOCKNUM();
    switch (get_sn_mr(sn) & 0x0F) {
    case Sn_MR_UDP:
    case Sn_MR_MACRAW:
    case Sn_MR_IPRAW:
    case Sn_MR_IPRAW6:
        break;
    default:
        FAIL(sock_mode);
    }
    tmp = get_sn_mr(sn);
    if (tmp != Sn_MR_MACRAW) {
        if (addrlen == 16) {
            if (tmp & 0x08) {
                set_sn_dip6r(sn, const_cast<uint8_t*>(addr.ip.data()));
                tcmd = Sn_CR_SEND6;
            } else {
                FAIL(sock_mode);
            }
        } else if (addrlen == 4) {
            if (tmp == Sn_MR_UDP6 || tmp == Sn_MR_IPRAW6) FAIL(sock_mode);
            set_sn_dipr(sn, const_cast<uint8_t*>(addr.ip.data()));
            tcmd = Sn_CR_SEND;
        } else {
            FAIL(ip_invalid);
        }
    }
    if ((tmp & 0x03) == 0x02) {
        if (p) {
            set_sn_dportr(sn, p);
        } else {
            FAIL(port_zero);
        }
    }

    freesize = get_sn_tx_max(sn);
    if (len > freesize) len = freesize;
    while (1) {
        freesize = get_sn_tx_fsr(sn);
        if (get_sn_sr(sn) == SOCK_CLOSED) FAIL(sock_closed);
        if ((sock_io_mode_bits & (1 << sn)) && (len > freesize)) FAIL(busy);
        if (len <= freesize) break;
    };
    send_data(sn, const_cast<uint8_t*>(buf.data()), len);
    set_sn_cr(sn, tcmd);
    while (get_sn_cr(sn));
    while (1) {
        tmp = get_sn_ir(sn);
        if (tmp & SnREG_IRSENDOK) {
            set_sn_ir(sn, SnREG_IRSENDOK);
            break;
        } else if (tmp & SnREG_IRTIMEOUT) {
            set_sn_ir(sn, SnREG_IRTIMEOUT);
            FAIL(timeout);
        }
    }
    return len;
}

std::expected<uint16_t, sock_error> recvfrom(socket_id sid, std::span<uint8_t> buf, ip_address& addr, port_num& port) {
    uint8_t sn = static_cast<uint8_t>(sid);
    uint16_t len = buf.size();
    uint8_t mr;
    uint8_t head[8];
    uint16_t pack_len = 0;

    CHECK_SOCKNUM();
    CHECK_SOCKDATA();

    switch ((mr = get_sn_mr(sn)) & 0x0F) {
    case Sn_MR_UDP:
    case Sn_MR_IPRAW:
    case Sn_MR_IPRAW6:
    case Sn_MR_MACRAW:
        break;
    default:
        FAIL(sock_mode);
    }

    if (sock_remained_size[sn] == 0) {
        while (1) {
            pack_len = get_sn_rx_rsr(sn);
            if (get_sn_sr(sn) == SOCK_CLOSED) FAIL(sock_closed);
            if (pack_len != 0) {
                sock_pack_info[sn] = PACK_NONE;
                break;
            }
            if (sock_io_mode_bits & (1 << sn)) FAIL(busy);
        };
    }

    recv_data(sn, head, 2);
    set_sn_cr(sn, Sn_CR_RECV);
    while (get_sn_cr(sn));
    pack_len = head[0] & 0x07;
    pack_len = (pack_len << 8) + head[1];

    switch (mr & 0x07) {
    case Sn_MR_UDP4:
    case Sn_MR_UDP6:
    case Sn_MR_UDPD:
        sock_pack_info[sn] = head[0] & 0xF8;
        if (sock_pack_info[sn] & PACK_IPv6) addr.len = 16;
        else addr.len = 4;
        recv_data(sn, addr.ip.data(), addr.len);
        set_sn_cr(sn, Sn_CR_RECV);
        while (get_sn_cr(sn));
        break;
    case Sn_MR_MACRAW:
        if (sock_remained_size[sn] == 0) {
            sock_remained_size[sn] = head[0];
            sock_remained_size[sn] = (sock_remained_size[sn] << 8) + head[1] - 2;
            if (sock_remained_size[sn] > 1514) {
                close(sid);
                FAIL(fatal_packlen);
            }
            sock_pack_info[sn] = PACK_FIRST;
        }
        if (len < sock_remained_size[sn]) pack_len = len;
        else pack_len = sock_remained_size[sn];
        recv_data(sn, buf.data(), pack_len);
        break;
    case Sn_MR_IPRAW6:
    case Sn_MR_IPRAW4:
        if (sock_remained_size[sn] == 0) {
            sock_pack_info[sn] = head[0] & 0xF8;
            if (sock_pack_info[sn] & PACK_IPv6) addr.len = 16;
            else addr.len = 4;
            recv_data(sn, addr.ip.data(), addr.len);
            set_sn_cr(sn, Sn_CR_RECV);
            while (get_sn_cr(sn));
        }
        break;
    default:
        recv_ignore(sn, pack_len);
        sock_remained_size[sn] = pack_len;
        break;
    }

    sock_remained_size[sn] = pack_len;
    sock_pack_info[sn] |= PACK_FIRST;
    if ((get_sn_mr(sn) & 0x03) == 0x02) {
        recv_data(sn, head, 2);
        port = static_cast<port_num>((((uint16_t)head[0]) << 8) + head[1]);
        set_sn_cr(sn, Sn_CR_RECV);
        while (get_sn_cr(sn));
    }

    if (len < sock_remained_size[sn]) pack_len = len;
    else pack_len = sock_remained_size[sn];
    recv_data(sn, buf.data(), pack_len);
    set_sn_cr(sn, Sn_CR_RECV);
    while (get_sn_cr(sn));

    sock_remained_size[sn] -= pack_len;
    if (sock_remained_size[sn] != 0) sock_pack_info[sn] |= PACK_REMAINED;
    else sock_pack_info[sn] |= PACK_COMPLETED;

    return pack_len;
}


std::optional<uint16_t> peek_socket_msg(socket_id sid, std::span<const uint8_t> submsg) {
    uint16_t subsize = submsg.size();
    uint8_t sn = static_cast<uint8_t>(sid);
    uint32_t rx_ptr = 0;
    uint16_t i = 0, sub_idx = 0;
    if ((get_sn_rx_rsr(sn) > 0) && (subsize > 0)) {
        rx_ptr = ((uint32_t)get_sn_rx_rd(sn) << 8) + RXBUF_BLOCK(sn);
        sub_idx = 0;
        for (i = 0; i < get_sn_rx_rsr(sn); i++) {
            if (reg_read(rx_ptr) == submsg[sub_idx]) {
                sub_idx++;
                if (sub_idx == subsize) return static_cast<uint16_t>(i + 1 - sub_idx);
            } else {
                sub_idx = 0;
            }
            rx_ptr = offset_inc(rx_ptr, 1);
        }
    }
    return std::nullopt;
}

void reset() {
    gpio_init(PIN_RST);
    gpio_set_dir(PIN_RST, GPIO_OUT);
    gpio_put(PIN_RST, 0);
    sleep_ms(100);
    gpio_put(PIN_RST, 1);
    sleep_ms(100);
}

void init_spi() {
    pio_init();
}

void init_critical_section() {
    critical_section_init(&g_cris_sec);
}

void init() {
    pio_frame_end();
    std::array<uint8_t, 8> txsize = {4, 4, 4, 4, 4, 4, 4, 4};
    std::array<uint8_t, 8> rxsize = {4, 4, 4, 4, 4, 4, 4, 4};
    init_buffers(txsize, rxsize);
}

bool check() {
    return get_cidr() == 0x6300;
}

void init_net(const net_info& info) {
    chip_unlock();
    net_unlock();
    set_net_info(info);
}

std::expected<void, sock_error> set_socket_io_mode(socket_id sid, sock_io_mode mode) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if (sn >= SOCK_COUNT) FAIL(sock_num);
    if (mode == sock_io_mode::nonblock) sock_io_mode_bits |= (1 << sn);
    else if (mode == sock_io_mode::block) sock_io_mode_bits &= ~(1 << sn);
    else FAIL(arg);
    return {};
}

sock_io_mode get_socket_io_mode(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    return static_cast<sock_io_mode>((sock_io_mode_bits >> sn) & 0x01);
}

uint16_t get_socket_max_tx(socket_id sid) {
    return get_sn_tx_max(static_cast<uint8_t>(sid));
}

uint16_t get_socket_max_rx(socket_id sid) {
    return get_sn_rx_max(static_cast<uint8_t>(sid));
}

std::expected<void, sock_error> clear_socket_interrupt(socket_id sid, uint8_t flags) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if (sn >= SOCK_COUNT) FAIL(sock_num);
    if (flags > SIK_ALL) FAIL(arg);
    set_sn_ir(sn, flags);
    return {};
}

uint8_t get_socket_interrupt(socket_id sid) {
    return get_sn_ir(static_cast<uint8_t>(sid));
}

std::expected<void, sock_error> set_socket_interrupt_mask(socket_id sid, uint8_t mask) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if (sn >= SOCK_COUNT) FAIL(sock_num);
    if (mask > SIK_ALL) FAIL(arg);
    set_sn_imr(sn, mask);
    return {};
}

uint8_t get_socket_interrupt_mask(socket_id sid) {
    return get_sn_imr(static_cast<uint8_t>(sid));
}

std::expected<void, sock_error> set_socket_prefer(socket_id sid, srcv6_prefer pref) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if (sn >= SOCK_COUNT) FAIL(sock_num);
    uint8_t v = static_cast<uint8_t>(pref);
    if ((v & 0x03) == 0x01) FAIL(arg);
    set_sn_psr(sn, v);
    return {};
}

srcv6_prefer get_socket_prefer(socket_id sid) {
    return static_cast<srcv6_prefer>(get_sn_psr(static_cast<uint8_t>(sid)));
}

void set_socket_ttl(socket_id sid, uint8_t ttl) {
    set_sn_ttl(static_cast<uint8_t>(sid), ttl);
}

uint8_t get_socket_ttl(socket_id sid) {
    return get_sn_ttl(static_cast<uint8_t>(sid));
}

void set_socket_tos(socket_id sid, uint8_t tos) {
    set_sn_tos(static_cast<uint8_t>(sid), tos);
}

uint8_t get_socket_tos(socket_id sid) {
    return get_sn_tos(static_cast<uint8_t>(sid));
}

void set_socket_mss(socket_id sid, uint16_t mss) {
    set_sn_mssr(static_cast<uint8_t>(sid), mss);
}

uint16_t get_socket_mss(socket_id sid) {
    return get_sn_mssr(static_cast<uint8_t>(sid));
}

void set_socket_dest_ip(socket_id sid, const ip_address& addr) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if (addr.len == 16) set_sn_dip6r(sn, const_cast<uint8_t*>(addr.ip.data()));
    else set_sn_dipr(sn, const_cast<uint8_t*>(addr.ip.data()));
}

ip_address get_socket_dest_ip(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    ip_address addr = {};
    if (get_sn_esr(sn) & TCPSOCK_MODE) {
        get_sn_dip6r(sn, addr.ip.data());
        addr.len = 16;
    } else {
        get_sn_dipr(sn, addr.ip.data());
        addr.len = 4;
    }
    return addr;
}

void set_socket_dest_port(socket_id sid, port_num port) {
    set_sn_dportr(static_cast<uint8_t>(sid), static_cast<uint16_t>(port));
}

port_num get_socket_dest_port(socket_id sid) {
    return static_cast<port_num>(get_sn_dportr(static_cast<uint8_t>(sid)));
}

std::expected<void, sock_error> send_keepalive(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if ((get_sn_mr(sn) & 0x03) != 0x01) FAIL(sock_mode);
    if (get_sn_kpalvtr(sn) != 0) FAIL(sock_opt);
    set_sn_cr(sn, Sn_CR_SEND_KEEP);
    while (get_sn_cr(sn) != 0) {
        if (get_sn_ir(sn) & SnREG_IRTIMEOUT) {
            set_sn_ir(sn, SnREG_IRTIMEOUT);
            FAIL(timeout);
        }
    }
    return {};
}

void set_socket_keepalive_auto(socket_id sid, uint8_t interval) {
    set_sn_kpalvtr(static_cast<uint8_t>(sid), interval);
}

uint8_t get_socket_keepalive_auto(socket_id sid) {
    return get_sn_kpalvtr(static_cast<uint8_t>(sid));
}

uint16_t get_socket_send_buf(socket_id sid) {
    return get_sn_tx_fsr(static_cast<uint8_t>(sid));
}

uint16_t get_socket_recv_buf(socket_id sid) {
    return get_sn_rx_rsr(static_cast<uint8_t>(sid));
}

uint8_t get_socket_status(socket_id sid) {
    return get_sn_sr(static_cast<uint8_t>(sid));
}

uint8_t get_socket_ext_status(socket_id sid) {
    return get_sn_esr(static_cast<uint8_t>(sid)) & 0x07;
}

uint8_t get_socket_mode(socket_id sid) {
    return get_sn_mr(static_cast<uint8_t>(sid)) & 0x0F;
}

uint16_t get_socket_remain_size(socket_id sid) {
    uint8_t sn = static_cast<uint8_t>(sid);
    if (get_sn_mr(sn) & 0x01) return get_sn_rx_rsr(sn);
    return sock_remained_size[sn];
}

pack_info get_socket_pack_info(socket_id sid) {
    return static_cast<pack_info>(sock_pack_info[static_cast<uint8_t>(sid)]);
}

} // namespace w6300