From ff9f9a5c1f32fb9f381c6dd06c4e87351fc47060 Mon Sep 17 00:00:00 2001 From: Ian Gulliver Date: Fri, 10 Apr 2026 21:18:43 +0900 Subject: [PATCH] Remove unused W6300 register accessors and internal functions --- firmware/w6300/w6300.cpp | 361 +++++++++------------------------------ 1 file changed, 85 insertions(+), 276 deletions(-) diff --git a/firmware/w6300/w6300.cpp b/firmware/w6300/w6300.cpp index d930d17..30126d8 100644 --- a/firmware/w6300/w6300.cpp +++ b/firmware/w6300/w6300.cpp @@ -563,258 +563,74 @@ void reg_write_buf(uint32_t addr_sel, uint8_t* buf, datasize_t len); uint16_t get_sn_tx_fsr(uint8_t sn); uint16_t get_sn_rx_rsr(uint8_t sn); -inline uint8_t get_rtl() { return reg_read(REG_RTL); } -inline uint16_t get_cidr() { return (((uint16_t)reg_read(REG_CIDR) | (((reg_read(REG_RTL)) & 0x0F) << 1)) << 8) + reg_read(offset_inc(REG_CIDR, 1)); } -inline uint16_t get_ver() { return (((uint16_t)reg_read(REG_VER)) << 8) + reg_read(offset_inc(REG_VER, 1)); } -inline uint8_t get_sysr() { return reg_read(REG_SYSR); } -inline uint8_t get_sycr0() { return reg_read(REG_SYCR0); } -inline void set_sycr0(uint8_t v) { reg_write(REG_SYCR0, v); } -inline uint8_t get_sycr1() { return reg_read(REG_SYCR1); } -inline void set_sycr1(uint8_t v) { reg_write(REG_SYCR1, v); } -inline uint16_t get_tcntr() { return (((uint16_t)reg_read(REG_TCNTR)) << 8) + reg_read(offset_inc(REG_TCNTR, 1)); } -inline void set_tcntrclr(uint8_t v) { reg_write(REG_TCNTRCLR, v); } -inline uint8_t get_ir() { return reg_read(REG_IR); } -inline uint8_t get_sir() { return reg_read(REG_SIR); } -inline uint8_t get_slir() { return reg_read(REG_SLIR); } -inline void set_imr(uint8_t v) { reg_write(REG_IMR, v); } -inline uint8_t get_imr() { return reg_read(REG_IMR); } -inline void set_irclr(uint8_t v) { reg_write(REG_IRCLR, v); } -inline void set_ir(uint8_t v) { set_irclr(v); } -inline void set_simr(uint8_t v) { reg_write(REG_SIMR, v); } -inline uint8_t get_simr() { return reg_read(REG_SIMR); } -inline void set_slimr(uint8_t v) { reg_write(REG_SLIMR, v); } -inline uint8_t get_slimr() { return reg_read(REG_SLIMR); } -inline void set_slirclr(uint8_t v) { reg_write(REG_SLIRCLR, v); } -inline void set_slir(uint8_t v) { set_slirclr(v); } -inline void set_slpsr(uint8_t v) { reg_write(REG_SLPSR, v); } -inline uint8_t get_slpsr() { return reg_read(REG_SLPSR); } -inline void set_slcr(uint8_t v) { reg_write(REG_SLCR, v); } -inline uint8_t get_slcr() { return reg_read(REG_SLCR); } -inline uint8_t get_physr() { return reg_read(REG_PHYSR); } -inline void set_phyrar(uint8_t v) { reg_write(REG_PHYRAR, v); } -inline uint8_t get_phyrar() { return reg_read(REG_PHYRAR); } -inline void set_phydir(uint16_t v) { - reg_write(offset_inc(REG_PHYDIR, 1), (uint8_t)(v >> 8)); - reg_write(REG_PHYDIR, (uint8_t)v); -} -inline uint16_t get_phydor() { return (((uint16_t)reg_read(offset_inc(REG_PHYDOR, 1))) << 8) + reg_read(REG_PHYDOR); } -inline void set_phyacr(uint8_t v) { reg_write(REG_PHYACR, v); } -inline uint8_t get_phyacr() { return reg_read(REG_PHYACR); } -inline void set_phydivr(uint8_t v) { reg_write(REG_PHYDIVR, v); } -inline uint8_t get_phydivr() { return reg_read(REG_PHYDIVR); } -inline void set_phycr0(uint8_t v) { reg_write(REG_PHYCR0, v); } -inline void set_phycr1(uint8_t v) { reg_write(REG_PHYCR1, v); } -inline uint8_t get_phycr1() { return reg_read(REG_PHYCR1); } -inline void set_net4mr(uint8_t v) { reg_write(REG_NET4MR, v); } -inline void set_net6mr(uint8_t v) { reg_write(REG_NET6MR, v); } -inline void set_netmr(uint8_t v) { reg_write(REG_NETMR, v); } -inline void set_netmr2(uint8_t v) { reg_write(REG_NETMR2, v); } -inline uint8_t get_net4mr() { return reg_read(REG_NET4MR); } -inline uint8_t get_net6mr() { return reg_read(REG_NET6MR); } -inline uint8_t get_netmr() { return reg_read(REG_NETMR); } -inline uint8_t get_netmr2() { return reg_read(REG_NETMR2); } -inline void set_ptmr(uint8_t v) { reg_write(REG_PTMR, v); } -inline uint8_t get_ptmr() { return reg_read(REG_PTMR); } -inline void set_pmnr(uint8_t v) { reg_write(REG_PMNR, v); } -inline uint8_t get_pmnr() { return reg_read(REG_PMNR); } -inline void set_phar(uint8_t* v) { reg_write_buf(REG_PHAR, v, 6); } -inline void get_phar(uint8_t* v) { reg_read_buf(REG_PHAR, v, 6); } -inline void set_psidr(uint16_t v) { - reg_write(REG_PSIDR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_PSIDR, 1), (uint8_t)v); -} -inline uint16_t get_psidr() { return (((uint16_t)reg_read(REG_PSIDR)) << 8) + reg_read(offset_inc(REG_PSIDR, 1)); } -inline void set_pmrur(uint16_t v) { - reg_write(REG_PMRUR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_PMRUR, 1), (uint8_t)v); -} -inline uint16_t get_pmrur() { return (((uint16_t)reg_read(REG_PMRUR)) << 8) + reg_read(offset_inc(REG_PMRUR, 1)); } -inline void set_shar(uint8_t* v) { reg_write_buf(REG_SHAR, v, 6); } -inline void get_shar(uint8_t* v) { reg_read_buf(REG_SHAR, v, 6); } -inline void set_gar(uint8_t* v) { reg_write_buf(REG_GAR, v, 4); } -inline void get_gar(uint8_t* v) { reg_read_buf(REG_GAR, v, 4); } -inline void set_ga4r(uint8_t* v) { set_gar(v); } -inline void get_ga4r(uint8_t* v) { get_gar(v); } -inline void set_subr(uint8_t* v) { reg_write_buf(REG_SUBR, v, 4); } -inline void get_subr(uint8_t* v) { reg_read_buf(REG_SUBR, v, 4); } -inline void set_sub4r(uint8_t* v) { set_subr(v); } -inline void get_sub4r(uint8_t* v) { get_subr(v); } -inline void set_sipr(uint8_t* v) { reg_write_buf(REG_SIPR, v, 4); } -inline void get_sipr(uint8_t* v) { reg_read_buf(REG_SIPR, v, 4); } -inline void set_llar(uint8_t* v) { reg_write_buf(REG_LLAR, v, 16); } -inline void get_llar(uint8_t* v) { reg_read_buf(REG_LLAR, v, 16); } -inline void set_guar(uint8_t* v) { reg_write_buf(REG_GUAR, v, 16); } -inline void get_guar(uint8_t* v) { reg_read_buf(REG_GUAR, v, 16); } -inline void set_sub6r(uint8_t* v) { reg_write_buf(REG_SUB6R, v, 16); } -inline void get_sub6r(uint8_t* v) { reg_read_buf(REG_SUB6R, v, 16); } -inline void set_ga6r(uint8_t* v) { reg_write_buf(REG_GA6R, v, 16); } -inline void get_ga6r(uint8_t* v) { reg_read_buf(REG_GA6R, v, 16); } -inline void set_sldipr(uint8_t* v) { reg_write_buf(REG_SLDIPR, v, 4); } -inline void set_sldip4r(uint8_t* v) { set_sldipr(v); } -inline void get_sldipr(uint8_t* v) { reg_read_buf(REG_SLDIPR, v, 4); } -inline void get_sldip4r(uint8_t* v) { get_sldipr(v); } -inline void set_sldip6r(uint8_t* v) { reg_write_buf(REG_SLDIP6R, v, 16); } -inline void get_sldip6r(uint8_t* v) { reg_read_buf(REG_SLDIP6R, v, 16); } -inline void get_sldhar(uint8_t* v) { reg_read_buf(REG_SLDHAR, v, 6); } -inline void set_pingidr(uint16_t v) { - reg_write(REG_PINGIDR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_PINGIDR, 1), (uint8_t)v); -} -inline uint16_t get_pingidr() { return ((uint16_t)(reg_read(REG_PINGIDR) << 8)) + reg_read(offset_inc(REG_PINGIDR, 1)); } -inline void set_pingseqr(uint16_t v) { - reg_write(REG_PINGSEQR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_PINGSEQR, 1), (uint8_t)v); -} -inline uint16_t get_pingseqr() { return ((uint16_t)(reg_read(REG_PINGSEQR) << 8)) + reg_read(offset_inc(REG_PINGSEQR, 1)); } -inline void get_uipr(uint8_t* v) { reg_read_buf(REG_UIPR, v, 4); } -inline void get_uip4r(uint8_t* v) { get_uipr(v); } -inline uint16_t get_uportr() { return (((uint16_t)reg_read(REG_UPORTR)) << 8) + reg_read(offset_inc(REG_UPORTR, 1)); } -inline uint16_t get_uport4r() { return get_uportr(); } -inline void get_uip6r(uint8_t* v) { reg_read_buf(REG_UIP6R, v, 16); } -inline uint16_t get_uport6r() { return (((uint16_t)reg_read(REG_UPORT6R)) << 8) + reg_read(offset_inc(REG_UPORT6R, 1)); } -inline void set_intptmr(uint16_t v) { - reg_write(REG_INTPTMR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_INTPTMR, 1), (uint8_t)v); -} -inline uint16_t get_intptmr() { return (((uint16_t)reg_read(REG_INTPTMR)) << 8) + reg_read(offset_inc(REG_INTPTMR, 1)); } -inline uint8_t get_plr() { return reg_read(REG_PLR); } -inline uint8_t get_pfr() { return reg_read(REG_PFR); } -inline uint32_t get_vltr() { - return (((uint32_t)reg_read(REG_VLTR)) << 24) + - (((uint32_t)reg_read(offset_inc(REG_VLTR, 1))) << 16) + - (((uint32_t)reg_read(offset_inc(REG_VLTR, 2))) << 8) + - ((uint32_t)reg_read(offset_inc(REG_VLTR, 3))); -} -inline uint32_t get_pltr() { - return (((uint32_t)reg_read(REG_PLTR)) << 24) + - (((uint32_t)reg_read(offset_inc(REG_PLTR, 1))) << 16) + - (((uint32_t)reg_read(offset_inc(REG_PLTR, 2))) << 8) + - ((uint32_t)reg_read(offset_inc(REG_PLTR, 3))); -} -inline void get_par(uint8_t* v) { reg_read_buf(REG_PAR, v, 16); } -inline void set_icmp6blkr(uint8_t v) { reg_write(REG_ICMP6BLKR, v); } -inline uint8_t get_icmp6blkr() { return reg_read(REG_ICMP6BLKR); } -inline void set_chplckr(uint8_t v) { reg_write(REG_CHPLCKR, v); } -inline uint8_t get_chplckr() { return (get_sysr() & SYSR_CHPL) >> 7; } -inline void chip_lock() { set_chplckr(0xFF); } -inline void chip_unlock() { set_chplckr(0xCE); } -inline void set_netlckr(uint8_t v) { reg_write(REG_NETLCKR, v); } -inline uint8_t get_netlckr() { return (get_sysr() & SYSR_NETL) >> 6; } -inline void net_lock() { set_netlckr(0xC5); } -inline void net_unlock() { set_netlckr(0x3A); } -inline void set_phylckr(uint8_t v) { reg_write(REG_PHYLCKR, v); } -inline uint8_t get_phylckr() { return (get_sysr() & SYSR_PHYL) >> 5; } -inline void phy_lock() { set_phylckr(0xFF); } -inline void phy_unlock() { set_phylckr(0x53); } -inline void set_rtr(uint16_t v) { - reg_write(REG_RTR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_RTR, 1), (uint8_t)v); -} -inline uint16_t get_rtr() { return (((uint16_t)reg_read(REG_RTR)) << 8) + reg_read(offset_inc(REG_RTR, 1)); } -inline void set_rcr(uint8_t v) { reg_write(REG_RCR, v); } -inline uint8_t get_rcr() { return reg_read(REG_RCR); } -inline void set_slrtr(uint16_t v) { - reg_write(REG_SLRTR, (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_SLRTR, 1), (uint8_t)v); -} -inline uint16_t get_slrtr() { return (((uint16_t)reg_read(REG_SLRTR)) << 8) + reg_read(offset_inc(REG_SLRTR, 1)); } -inline void set_slrcr(uint8_t v) { reg_write(REG_SLRCR, v); } -inline uint8_t get_slrcr() { return reg_read(REG_SLRCR); } -inline void set_slhopr(uint8_t v) { reg_write(REG_SLHOPR, v); } -inline uint8_t get_slhopr() { return reg_read(REG_SLHOPR); } +uint16_t get_cidr() { return (((uint16_t)reg_read(REG_CIDR) | (((reg_read(REG_RTL)) & 0x0F) << 1)) << 8) + reg_read(offset_inc(REG_CIDR, 1)); } +uint8_t get_sysr() { return reg_read(REG_SYSR); } +uint8_t get_sycr0() { return reg_read(REG_SYCR0); } +void set_sycr0(uint8_t v) { reg_write(REG_SYCR0, v); } +void set_imr(uint8_t v) { reg_write(REG_IMR, v); } +void set_irclr(uint8_t v) { reg_write(REG_IRCLR, v); } +void set_simr(uint8_t v) { reg_write(REG_SIMR, v); } +void set_slimr(uint8_t v) { reg_write(REG_SLIMR, v); } +void set_slirclr(uint8_t v) { reg_write(REG_SLIRCLR, v); } +void set_shar(uint8_t* v) { reg_write_buf(REG_SHAR, v, 6); } +void get_shar(uint8_t* v) { reg_read_buf(REG_SHAR, v, 6); } +void set_gar(uint8_t* v) { reg_write_buf(REG_GAR, v, 4); } +void get_gar(uint8_t* v) { reg_read_buf(REG_GAR, v, 4); } +void set_subr(uint8_t* v) { reg_write_buf(REG_SUBR, v, 4); } +void get_subr(uint8_t* v) { reg_read_buf(REG_SUBR, v, 4); } +void set_sipr(uint8_t* v) { reg_write_buf(REG_SIPR, v, 4); } +void get_sipr(uint8_t* v) { reg_read_buf(REG_SIPR, v, 4); } +void set_llar(uint8_t* v) { reg_write_buf(REG_LLAR, v, 16); } +void get_llar(uint8_t* v) { reg_read_buf(REG_LLAR, v, 16); } +void set_guar(uint8_t* v) { reg_write_buf(REG_GUAR, v, 16); } +void get_guar(uint8_t* v) { reg_read_buf(REG_GUAR, v, 16); } +void set_sub6r(uint8_t* v) { reg_write_buf(REG_SUB6R, v, 16); } +void get_sub6r(uint8_t* v) { reg_read_buf(REG_SUB6R, v, 16); } +void set_ga6r(uint8_t* v) { reg_write_buf(REG_GA6R, v, 16); } +void get_ga6r(uint8_t* v) { reg_read_buf(REG_GA6R, v, 16); } +void set_chplckr(uint8_t v) { reg_write(REG_CHPLCKR, v); } +void chip_lock() { set_chplckr(0xFF); } +void chip_unlock() { set_chplckr(0xCE); } +void set_netlckr(uint8_t v) { reg_write(REG_NETLCKR, v); } +void net_lock() { set_netlckr(0xC5); } +void net_unlock() { set_netlckr(0x3A); } -inline void set_sn_mr(uint8_t sn, uint8_t v) { reg_write(REG_SN_MR(sn), v); } -inline uint8_t get_sn_mr(uint8_t sn) { return reg_read(REG_SN_MR(sn)); } -inline void set_sn_psr(uint8_t sn, uint8_t v) { reg_write(REG_SN_PSR(sn), v); } -inline uint8_t get_sn_psr(uint8_t sn) { return reg_read(REG_SN_PSR(sn)); } -inline void set_sn_cr(uint8_t sn, uint8_t v) { reg_write(REG_SN_CR(sn), v); } -inline uint8_t get_sn_cr(uint8_t sn) { return reg_read(REG_SN_CR(sn)); } -inline uint8_t get_sn_ir(uint8_t sn) { return reg_read(REG_SN_IR(sn)); } -inline void set_sn_imr(uint8_t sn, uint8_t v) { reg_write(REG_SN_IMR(sn), v); } -inline uint8_t get_sn_imr(uint8_t sn) { return reg_read(REG_SN_IMR(sn)); } -inline void set_sn_irclr(uint8_t sn, uint8_t v) { reg_write(REG_SN_IRCLR(sn), v); } -inline void set_sn_ir(uint8_t sn, uint8_t v) { set_sn_irclr(sn, v); } -inline uint8_t get_sn_sr(uint8_t sn) { return reg_read(REG_SN_SR(sn)); } -inline uint8_t get_sn_esr(uint8_t sn) { return reg_read(REG_SN_ESR(sn)); } -inline void set_sn_pnr(uint8_t sn, uint8_t v) { reg_write(REG_SN_PNR(sn), v); } -inline void set_sn_nhr(uint8_t sn, uint8_t v) { set_sn_pnr(sn, v); } -inline uint8_t get_sn_pnr(uint8_t sn) { return reg_read(REG_SN_PNR(sn)); } -inline uint8_t get_sn_nhr(uint8_t sn) { return get_sn_pnr(sn); } -inline void set_sn_tosr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TOSR(sn), v); } -inline uint8_t get_sn_tosr(uint8_t sn) { return reg_read(REG_SN_TOSR(sn)); } -inline uint8_t get_sn_tos(uint8_t sn) { return get_sn_tosr(sn); } -inline void set_sn_tos(uint8_t sn, uint8_t v) { set_sn_tosr(sn, v); } -inline void set_sn_ttlr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TTLR(sn), v); } -inline uint8_t get_sn_ttlr(uint8_t sn) { return reg_read(REG_SN_TTLR(sn)); } -inline void set_sn_ttl(uint8_t sn, uint8_t v) { set_sn_ttlr(sn, v); } -inline uint8_t get_sn_ttl(uint8_t sn) { return get_sn_ttlr(sn); } -inline void set_sn_hopr(uint8_t sn, uint8_t v) { set_sn_ttlr(sn, v); } -inline uint8_t get_sn_hopr(uint8_t sn) { return get_sn_ttlr(sn); } -inline void set_sn_frgr(uint8_t sn, uint16_t v) { - reg_write(REG_SN_FRGR(sn), (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_SN_FRGR(sn), 1), (uint8_t)v); -} -inline uint16_t get_sn_frgr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_FRGR(sn))) << 8) + reg_read(offset_inc(REG_SN_FRGR(sn), 1)); } -inline void set_sn_mssr(uint8_t sn, uint16_t v) { - reg_write(REG_SN_MSSR(sn), (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_SN_MSSR(sn), 1), (uint8_t)v); -} -inline uint16_t get_sn_mssr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_MSSR(sn))) << 8) + reg_read(offset_inc(REG_SN_MSSR(sn), 1)); } -inline void set_sn_portr(uint8_t sn, uint16_t v) { +void set_sn_mr(uint8_t sn, uint8_t v) { reg_write(REG_SN_MR(sn), v); } +uint8_t get_sn_mr(uint8_t sn) { return reg_read(REG_SN_MR(sn)); } +void set_sn_cr(uint8_t sn, uint8_t v) { reg_write(REG_SN_CR(sn), v); } +uint8_t get_sn_cr(uint8_t sn) { return reg_read(REG_SN_CR(sn)); } +uint8_t get_sn_ir(uint8_t sn) { return reg_read(REG_SN_IR(sn)); } +void set_sn_irclr(uint8_t sn, uint8_t v) { reg_write(REG_SN_IRCLR(sn), v); } +void set_sn_ir(uint8_t sn, uint8_t v) { set_sn_irclr(sn, v); } +uint8_t get_sn_sr(uint8_t sn) { return reg_read(REG_SN_SR(sn)); } +void set_sn_portr(uint8_t sn, uint16_t v) { reg_write(REG_SN_PORTR(sn), (uint8_t)(v >> 8)); reg_write(offset_inc(REG_SN_PORTR(sn), 1), (uint8_t)v); } -inline uint16_t get_sn_portr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_PORTR(sn))) << 8) + reg_read(offset_inc(REG_SN_PORTR(sn), 1)); } -inline void set_sn_dhar(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DHAR(sn), v, 6); } -inline void get_sn_dhar(uint8_t sn, uint8_t* v) { reg_read_buf(REG_SN_DHAR(sn), v, 6); } -inline void set_sn_dipr(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DIPR(sn), v, 4); } -inline void get_sn_dipr(uint8_t sn, uint8_t* v) { reg_read_buf(REG_SN_DIPR(sn), v, 4); } -inline void set_sn_dip4r(uint8_t sn, uint8_t* v) { set_sn_dipr(sn, v); } -inline void get_sn_dip4r(uint8_t sn, uint8_t* v) { get_sn_dipr(sn, v); } -inline void set_sn_dip6r(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DIP6R(sn), v, 16); } -inline void get_sn_dip6r(uint8_t sn, uint8_t* v) { reg_read_buf(REG_SN_DIP6R(sn), v, 16); } -inline void set_sn_dportr(uint8_t sn, uint16_t v) { +void set_sn_dhar(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DHAR(sn), v, 6); } +void set_sn_dipr(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DIPR(sn), v, 4); } +void set_sn_dip6r(uint8_t sn, uint8_t* v) { reg_write_buf(REG_SN_DIP6R(sn), v, 16); } +void set_sn_dportr(uint8_t sn, uint16_t v) { reg_write(REG_SN_DPORTR(sn), (uint8_t)(v >> 8)); reg_write(offset_inc(REG_SN_DPORTR(sn), 1), (uint8_t)v); } -inline uint16_t get_sn_dportr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_DPORTR(sn))) << 8) + reg_read(offset_inc(REG_SN_DPORTR(sn), 1)); } -inline uint16_t get_sn_dport(uint8_t sn) { return get_sn_dportr(sn); } -inline void set_sn_dport(uint8_t sn, uint16_t v) { set_sn_dportr(sn, v); } -inline void set_sn_mr2(uint8_t sn, uint8_t v) { reg_write(REG_SN_MR2(sn), v); } -inline uint8_t get_sn_mr2(uint8_t sn) { return reg_read(REG_SN_MR2(sn)); } -inline void set_sn_rtr(uint8_t sn, uint16_t v) { - reg_write(REG_SN_RTR(sn), (uint8_t)(v >> 8)); - reg_write(offset_inc(REG_SN_RTR(sn), 1), (uint8_t)v); -} -inline uint16_t get_sn_rtr(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_RTR(sn))) << 8) + reg_read(offset_inc(REG_SN_RTR(sn), 1)); } -inline void set_sn_rcr(uint8_t sn, uint8_t v) { reg_write(REG_SN_RCR(sn), v); } -inline uint8_t get_sn_rcr(uint8_t sn) { return reg_read(REG_SN_RCR(sn)); } -inline void set_sn_kpalvtr(uint8_t sn, uint8_t v) { reg_write(REG_SN_KPALVTR(sn), v); } -inline uint8_t get_sn_kpalvtr(uint8_t sn) { return reg_read(REG_SN_KPALVTR(sn)); } -inline void set_sn_tx_bsr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TX_BSR(sn), v); } -inline void set_sn_txbuf_size(uint8_t sn, uint8_t v) { set_sn_tx_bsr(sn, v); } -inline uint8_t get_sn_tx_bsr(uint8_t sn) { return reg_read(REG_SN_TX_BSR(sn)); } -inline uint8_t get_sn_txbuf_size(uint8_t sn) { return get_sn_tx_bsr(sn); } -inline uint16_t get_sn_tx_max(uint8_t sn) { return get_sn_tx_bsr(sn) << 10; } - -inline uint16_t get_sn_tx_rd(uint8_t sn) { return (((uint16_t)reg_read(REG_SN_TX_RD(sn))) << 8) + reg_read(offset_inc(REG_SN_TX_RD(sn), 1)); } -inline void set_sn_tx_wr(uint8_t sn, uint16_t v) { +void set_sn_mr2(uint8_t sn, uint8_t v) { reg_write(REG_SN_MR2(sn), v); } +void set_sn_tx_bsr(uint8_t sn, uint8_t v) { reg_write(REG_SN_TX_BSR(sn), v); } +void set_sn_txbuf_size(uint8_t sn, uint8_t v) { set_sn_tx_bsr(sn, v); } +uint8_t get_sn_tx_bsr(uint8_t sn) { return reg_read(REG_SN_TX_BSR(sn)); } +uint16_t get_sn_tx_max(uint8_t sn) { return get_sn_tx_bsr(sn) << 10; } +uint16_t get_sn_tx_wr(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_TX_WR(sn)) << 8) + reg_read(offset_inc(REG_SN_TX_WR(sn), 1)); } +void set_sn_tx_wr(uint8_t sn, uint16_t v) { reg_write(REG_SN_TX_WR(sn), (uint8_t)(v >> 8)); reg_write(offset_inc(REG_SN_TX_WR(sn), 1), (uint8_t)v); } -inline uint16_t get_sn_tx_wr(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_TX_WR(sn)) << 8) + reg_read(offset_inc(REG_SN_TX_WR(sn), 1)); } -inline void set_sn_rx_bsr(uint8_t sn, uint8_t v) { reg_write(REG_SN_RX_BSR(sn), v); } -inline void set_sn_rxbuf_size(uint8_t sn, uint8_t v) { set_sn_rx_bsr(sn, v); } -inline uint8_t get_sn_rx_bsr(uint8_t sn) { return reg_read(REG_SN_RX_BSR(sn)); } -inline uint8_t get_sn_rxbuf_size(uint8_t sn) { return get_sn_rx_bsr(sn); } -inline uint16_t get_sn_rx_max(uint8_t sn) { return get_sn_rx_bsr(sn) << 10; } - -inline void set_sn_rx_rd(uint8_t sn, uint16_t v) { +void set_sn_rx_bsr(uint8_t sn, uint8_t v) { reg_write(REG_SN_RX_BSR(sn), v); } +void set_sn_rxbuf_size(uint8_t sn, uint8_t v) { set_sn_rx_bsr(sn, v); } +void set_sn_rx_rd(uint8_t sn, uint16_t v) { reg_write(REG_SN_RX_RD(sn), (uint8_t)(v >> 8)); reg_write(offset_inc(REG_SN_RX_RD(sn), 1), (uint8_t)v); } -inline uint16_t get_sn_rx_rd(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_RX_RD(sn)) << 8) + reg_read(offset_inc(REG_SN_RX_RD(sn), 1)); } -inline uint16_t get_sn_rx_wr(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_RX_WR(sn)) << 8) + reg_read(offset_inc(REG_SN_RX_WR(sn), 1)); } +uint16_t get_sn_rx_rd(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_RX_RD(sn)) << 8) + reg_read(offset_inc(REG_SN_RX_RD(sn), 1)); } static critical_section_t g_cris_sec; void cris_enter() { @@ -907,10 +723,6 @@ void recv_ignore(uint8_t sn, uint16_t len) { } -} // namespace - - - void soft_reset() { uint8_t gw[4], sn[4], sip[4], mac[6]; uint8_t gw6[16], sn6[16], lla[16], gua[16]; @@ -951,6 +763,36 @@ int8_t init_buffers(std::span txsize, std::span rx return 0; } +constexpr uint16_t SOCK_ANY_PORT_NUM = 0xC000; + +uint16_t sock_any_port = SOCK_ANY_PORT_NUM; +uint16_t sock_io_mode_bits = 0; +uint16_t sock_is_sending = 0; +uint16_t sock_remained_size[sock_count] = {0,}; +uint8_t sock_pack_info[sock_count] = {0,}; + +#define FAIL(e) return std::unexpected(sock_error::e) +#define CHECK_SOCKNUM() do { if(sn >= sock_count) FAIL(sock_num); } while(0) +#define CHECK_SOCKMODE(mode) do { if((get_sn_mr(sn) & 0x0F) != mode) FAIL(sock_mode); } while(0) +#define CHECK_SOCKDATA() do { if(len == 0) FAIL(data_len); } while(0) +#define CHECK_IPZERO(addr, addrlen) do { uint16_t ipzero=0; for(uint8_t i=0; i close(socket_id sid) { + uint8_t sn = static_cast(sid); + CHECK_SOCKNUM(); + set_sn_cr(sn, SN_CR_CLOSE); + while (get_sn_cr(sn)); + set_sn_ir(sn, 0xFF); + sock_io_mode_bits &= ~(1 << sn); + sock_is_sending &= ~(1 << sn); + sock_remained_size[sn] = 0; + sock_pack_info[sn] = PACK_NONE; + while (get_sn_sr(sn) != SOCK_CLOSED); + return {}; +} + +} // namespace + void clear_interrupt(intr_kind intr) { set_irclr((uint8_t)intr); uint8_t sir = (uint8_t)((uint16_t)intr >> 8); @@ -966,39 +808,6 @@ void set_interrupt_mask(intr_kind intr) { } -constexpr uint16_t SOCK_ANY_PORT_NUM = 0xC000; - -static uint16_t sock_any_port = SOCK_ANY_PORT_NUM; -static uint16_t sock_io_mode_bits = 0; -static uint16_t sock_is_sending = 0; -static uint16_t sock_remained_size[sock_count] = {0,}; -uint8_t sock_pack_info[sock_count] = {0,}; - -#define FAIL(e) return std::unexpected(sock_error::e) -#define CHECK_SOCKNUM() do { if(sn >= sock_count) FAIL(sock_num); } while(0) -#define CHECK_SOCKMODE(mode) do { if((get_sn_mr(sn) & 0x0F) != mode) FAIL(sock_mode); } while(0) -#define CHECK_TCPMODE() do { if((get_sn_mr(sn) & 0x03) != 0x01) FAIL(sock_mode); } while(0) -#define CHECK_UDPMODE() do { if((get_sn_mr(sn) & 0x03) != 0x02) FAIL(sock_mode); } while(0) -#define CHECK_IPMODE() do { if((get_sn_mr(sn) & 0x07) != 0x03) FAIL(sock_mode); } while(0) -#define CHECK_DGRAMMODE() do { if(get_sn_mr(sn) == SN_MR_CLOSED) FAIL(sock_mode); if((get_sn_mr(sn) & 0x03) == 0x01) FAIL(sock_mode); } while(0) -#define CHECK_SOCKINIT() do { if((get_sn_sr(sn) != SOCK_INIT)) FAIL(sock_init); } while(0) -#define CHECK_SOCKDATA() do { if(len == 0) FAIL(data_len); } while(0) -#define CHECK_IPZERO(addr, addrlen) do { uint16_t ipzero=0; for(uint8_t i=0; i close(socket_id sid) { - uint8_t sn = static_cast(sid); - CHECK_SOCKNUM(); - set_sn_cr(sn, SN_CR_CLOSE); - while (get_sn_cr(sn)); - set_sn_ir(sn, 0xFF); - sock_io_mode_bits &= ~(1 << sn); - sock_is_sending &= ~(1 << sn); - sock_remained_size[sn] = 0; - sock_pack_info[sn] = PACK_NONE; - while (get_sn_sr(sn) != SOCK_CLOSED); - return {}; -} - std::expected open_socket(socket_id sid, protocol proto, port_num port, sock_flag flag) { uint8_t sn = static_cast(sid); uint16_t p = static_cast(port);