From bee0fa3aef1ff4bd9df277f8165269da36a19842 Mon Sep 17 00:00:00 2001 From: Ian Gulliver Date: Fri, 10 Apr 2026 21:27:01 +0900 Subject: [PATCH] Remove critical section code, unused constants, and unused register definitions --- firmware/lib/net.cpp | 1 - firmware/w6300/w6300.cpp | 266 +-------------------------------------- firmware/w6300/w6300.h | 1 - 3 files changed, 2 insertions(+), 266 deletions(-) diff --git a/firmware/lib/net.cpp b/firmware/lib/net.cpp index b5dd7eb..79b6a8b 100644 --- a/firmware/lib/net.cpp +++ b/firmware/lib/net.cpp @@ -262,7 +262,6 @@ static void process_frame(const uint8_t* frame, size_t len) { bool net_init() { w6300::init_spi(); - w6300::init_critical_section(); w6300::reset(); w6300::init(); if (!w6300::check()) return false; diff --git a/firmware/w6300/w6300.cpp b/firmware/w6300/w6300.cpp index 30126d8..5ec661d 100644 --- a/firmware/w6300/w6300.cpp +++ b/firmware/w6300/w6300.cpp @@ -2,7 +2,6 @@ #include #include "pico/stdlib.h" #include "pico/error.h" -#include "pico/critical_section.h" #include "hardware/dma.h" #include "hardware/clocks.h" #include "w6300.h" @@ -233,28 +232,6 @@ using datasize_t = int16_t; constexpr uint8_t QSPI_MODE = 0x02 << 6; -constexpr uint16_t PHY_IO_MODE_PHYCR = 0x0000; -constexpr uint16_t PHY_IO_MODE_MII = 0x0010; -constexpr uint16_t PHY_IO_MODE = PHY_IO_MODE_MII; - -constexpr uint8_t SYS_CHIP_LOCK = (1 << 2); -constexpr uint8_t SYS_NET_LOCK = (1 << 1); -constexpr uint8_t SYS_PHY_LOCK = (1 << 0); - -constexpr uint8_t PHY_MODE_MANUAL = 0; -constexpr uint8_t PHY_MODE_AUTONEGO = 1; -constexpr uint8_t PHY_MODE_TE = 2; -constexpr uint8_t PHY_CONFBY_HW = 0; -constexpr uint8_t PHY_CONFBY_SW = 1; -constexpr uint8_t PHY_SPEED_10 = 0; -constexpr uint8_t PHY_SPEED_100 = 1; -constexpr uint8_t PHY_DUPLEX_HALF = 0; -constexpr uint8_t PHY_DUPLEX_FULL = 1; -constexpr uint8_t PHY_LINK_OFF = 0; -constexpr uint8_t PHY_LINK_ON = 1; -constexpr uint8_t PHY_POWER_NORM = 0; -constexpr uint8_t PHY_POWER_DOWN = 1; - constexpr uint8_t PACK_NONE = 0x00; constexpr uint8_t PACK_FIRST = 1 << 1; constexpr uint8_t PACK_REMAINED = 1 << 2; @@ -273,207 +250,47 @@ constexpr uint32_t offset_inc(uint32_t addr, uint32_t n) { return addr + (n << 8 constexpr uint32_t REG_CIDR = (0x0000 << 8) + CREG_BLOCK; constexpr uint32_t REG_RTL = (0x0004 << 8) + CREG_BLOCK; -constexpr uint32_t REG_VER = (0x0002 << 8) + CREG_BLOCK; constexpr uint32_t REG_SYSR = (0x2000 << 8) + CREG_BLOCK; constexpr uint32_t REG_SYCR0 = (0x2004 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SYCR1 = offset_inc(REG_SYCR0, 1); -constexpr uint32_t REG_TCNTR = (0x2016 << 8) + CREG_BLOCK; -constexpr uint32_t REG_TCNTRCLR = (0x2020 << 8) + CREG_BLOCK; -constexpr uint32_t REG_IR = (0x2100 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SIR = (0x2101 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLIR = (0x2102 << 8) + CREG_BLOCK; constexpr uint32_t REG_IMR = (0x2104 << 8) + CREG_BLOCK; constexpr uint32_t REG_IRCLR = (0x2108 << 8) + CREG_BLOCK; constexpr uint32_t REG_SIMR = (0x2114 << 8) + CREG_BLOCK; constexpr uint32_t REG_SLIMR = (0x2124 << 8) + CREG_BLOCK; constexpr uint32_t REG_SLIRCLR = (0x2128 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLPSR = (0x212C << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLCR = (0x2130 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYSR = (0x3000 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYRAR = (0x3008 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYDIR = (0x300C << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYDOR = (0x3010 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYACR = (0x3014 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYDIVR = (0x3018 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYCR0 = (0x301C << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYCR1 = offset_inc(REG_PHYCR0, 1); -constexpr uint32_t REG_NET4MR = (0x4000 << 8) + CREG_BLOCK; -constexpr uint32_t REG_NET6MR = (0x4004 << 8) + CREG_BLOCK; -constexpr uint32_t REG_NETMR = (0x4008 << 8) + CREG_BLOCK; -constexpr uint32_t REG_NETMR2 = (0x4009 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PTMR = (0x4100 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PMNR = (0x4104 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHAR = (0x4108 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PSIDR = (0x4110 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PMRUR = (0x4114 << 8) + CREG_BLOCK; constexpr uint32_t REG_SHAR = (0x4120 << 8) + CREG_BLOCK; constexpr uint32_t REG_GAR = (0x4130 << 8) + CREG_BLOCK; -constexpr uint32_t REG_GA4R = REG_GAR; constexpr uint32_t REG_SUBR = (0x4134 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SUB4R = REG_SUBR; constexpr uint32_t REG_SIPR = (0x4138 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SIP4R = REG_SIPR; constexpr uint32_t REG_LLAR = (0x4140 << 8) + CREG_BLOCK; constexpr uint32_t REG_GUAR = (0x4150 << 8) + CREG_BLOCK; constexpr uint32_t REG_SUB6R = (0x4160 << 8) + CREG_BLOCK; constexpr uint32_t REG_GA6R = (0x4170 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLDIP6R = (0x4180 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLDIPR = (0x418C << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLDIP4R = REG_SLDIPR; -constexpr uint32_t REG_SLDHAR = (0x4190 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PINGIDR = (0x4198 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PINGSEQR = (0x419C << 8) + CREG_BLOCK; -constexpr uint32_t REG_UIPR = (0x41A0 << 8) + CREG_BLOCK; -constexpr uint32_t REG_UIP4R = REG_UIPR; -constexpr uint32_t REG_UPORTR = (0x41A4 << 8) + CREG_BLOCK; -constexpr uint32_t REG_UPORT4R = REG_UPORTR; -constexpr uint32_t REG_UIP6R = (0x41B0 << 8) + CREG_BLOCK; -constexpr uint32_t REG_UPORT6R = (0x41C0 << 8) + CREG_BLOCK; -constexpr uint32_t REG_INTPTMR = (0x41C5 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PLR = (0x41D0 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PFR = (0x41D4 << 8) + CREG_BLOCK; -constexpr uint32_t REG_VLTR = (0x41D8 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PLTR = (0x41DC << 8) + CREG_BLOCK; -constexpr uint32_t REG_PAR = (0x41E0 << 8) + CREG_BLOCK; -constexpr uint32_t REG_ICMP6BLKR = (0x41F0 << 8) + CREG_BLOCK; constexpr uint32_t REG_CHPLCKR = (0x41F4 << 8) + CREG_BLOCK; constexpr uint32_t REG_NETLCKR = (0x41F5 << 8) + CREG_BLOCK; -constexpr uint32_t REG_PHYLCKR = (0x41F6 << 8) + CREG_BLOCK; -constexpr uint32_t REG_RTR = (0x4200 << 8) + CREG_BLOCK; -constexpr uint32_t REG_RCR = (0x4204 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLRTR = (0x4208 << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLRCR = (0x420C << 8) + CREG_BLOCK; -constexpr uint32_t REG_SLHOPR = (0x420F << 8) + CREG_BLOCK; constexpr uint32_t REG_SN_MR(uint8_t n) { return (0x0000 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_PSR(uint8_t n) { return (0x0004 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_CR(uint8_t n) { return (0x0010 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_IR(uint8_t n) { return (0x0020 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_IMR(uint8_t n) { return (0x0024 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_IRCLR(uint8_t n) { return (0x0028 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_SR(uint8_t n) { return (0x0030 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_ESR(uint8_t n) { return (0x0031 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_PNR(uint8_t n) { return (0x0100 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_NHR(uint8_t n) { return REG_SN_PNR(n); } -constexpr uint32_t REG_SN_TOSR(uint8_t n) { return (0x0104 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_TTLR(uint8_t n) { return (0x0108 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_HOPR(uint8_t n) { return REG_SN_TTLR(n); } -constexpr uint32_t REG_SN_FRGR(uint8_t n) { return (0x010C << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_MSSR(uint8_t n) { return (0x0110 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_PORTR(uint8_t n) { return (0x0114 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_DHAR(uint8_t n) { return (0x0118 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_DIPR(uint8_t n) { return (0x0120 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_DIP4R(uint8_t n) { return REG_SN_DIPR(n); } constexpr uint32_t REG_SN_DIP6R(uint8_t n) { return (0x0130 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_DPORTR(uint8_t n) { return (0x0140 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_MR2(uint8_t n) { return (0x0144 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_RTR(uint8_t n) { return (0x0180 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_RCR(uint8_t n) { return (0x0184 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_KPALVTR(uint8_t n) { return (0x0188 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_TX_BSR(uint8_t n) { return (0x0200 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_TX_FSR(uint8_t n) { return (0x0204 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_TX_RD(uint8_t n) { return (0x0208 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_TX_WR(uint8_t n) { return (0x020C << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_RX_BSR(uint8_t n) { return (0x0220 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_RX_RSR(uint8_t n) { return (0x0224 << 8) + SREG_BLOCK(n); } constexpr uint32_t REG_SN_RX_RD(uint8_t n) { return (0x0228 << 8) + SREG_BLOCK(n); } -constexpr uint32_t REG_SN_RX_WR(uint8_t n) { return (0x022C << 8) + SREG_BLOCK(n); } constexpr uint8_t SYSR_CHPL = 1 << 7; constexpr uint8_t SYSR_NETL = 1 << 6; -constexpr uint8_t SYSR_PHYL = 1 << 5; -constexpr uint8_t SYSR_IND = 1 << 5; -constexpr uint8_t SYSR_SPI = 1 << 0; constexpr uint8_t SYCR0_RST = 0x00; -constexpr uint8_t SYCR1_IEN = 1 << 7; -constexpr uint8_t SYCR1_CLKSEL = 1 << 0; -constexpr uint8_t SYCR1_CLKSEL_25M = 1; -constexpr uint8_t SYCR1_CLKSEL_100M = 0; -constexpr uint8_t IR_WOL = 1 << 7; -constexpr uint8_t IR_UNR6 = 1 << 4; -constexpr uint8_t IR_IPCONF = 1 << 2; -constexpr uint8_t IR_UNR4 = 1 << 1; -constexpr uint8_t IR_PTERM = 1 << 0; -constexpr uint8_t SIR_INT(uint8_t n) { return 1 << n; } -constexpr uint8_t SLIR_TOUT = 1 << 7; -constexpr uint8_t SLIR_ARP4 = 1 << 6; -constexpr uint8_t SLIR_PING4 = 1 << 5; -constexpr uint8_t SLIR_ARP6 = 1 << 4; -constexpr uint8_t SLIR_PING6 = 1 << 3; -constexpr uint8_t SLIR_NS = 1 << 2; -constexpr uint8_t SLIR_RS = 1 << 1; -constexpr uint8_t SLIR_RA = 1 << 0; -constexpr uint8_t PSR_AUTO = 0x00; -constexpr uint8_t PSR_LLA = 0x02; -constexpr uint8_t PSR_GUA = 0x03; -constexpr uint8_t SLCR_ARP4 = 1 << 6; -constexpr uint8_t SLCR_PING4 = 1 << 5; -constexpr uint8_t SLCR_ARP6 = 1 << 4; -constexpr uint8_t SLCR_PING6 = 1 << 3; -constexpr uint8_t SLCR_NS = 1 << 2; -constexpr uint8_t SLCR_RS = 1 << 1; -constexpr uint8_t SLCR_UNA = 1 << 0; -constexpr uint8_t PHYSR_CAB = 1 << 7; -constexpr uint8_t PHYSR_CAB_OFF = 1 << 7; -constexpr uint8_t PHYSR_CAB_ON = 0 << 7; -constexpr uint8_t PHYSR_MODE = 7 << 3; -constexpr uint8_t PHYSR_MODE_AUTO = 0 << 3; -constexpr uint8_t PHYSR_MODE_100F = 4 << 3; -constexpr uint8_t PHYSR_MODE_100H = 5 << 3; -constexpr uint8_t PHYSR_MODE_10F = 6 << 3; -constexpr uint8_t PHYSR_MODE_10H = 7 << 3; -constexpr uint8_t PHYSR_DPX = 1 << 2; -constexpr uint8_t PHYSR_DPX_HALF = 1 << 2; -constexpr uint8_t PHYSR_DPX_FULL = 0 << 2; -constexpr uint8_t PHYSR_SPD = 1 << 1; -constexpr uint8_t PHYSR_SPD_10M = 1 << 1; -constexpr uint8_t PHYSR_SPD_100M = 0 << 1; -constexpr uint8_t PHYSR_LNK = 1 << 0; -constexpr uint8_t PHYSR_LNK_UP = 1 << 0; -constexpr uint8_t PHYSR_LNK_DOWN = 0 << 0; -constexpr uint8_t PHYACR_READ = 0x02; -constexpr uint8_t PHYACR_WRITE = 0x01; -constexpr uint8_t PHYDIVR_32 = 0x00; -constexpr uint8_t PHYDIVR_64 = 0x01; -constexpr uint8_t PHYDIVR_128 = 0xFF; -constexpr uint8_t PHYCR0_AUTO = 0x00; -constexpr uint8_t PHYCR0_100F = 0x04; -constexpr uint8_t PHYCR0_100H = 0x05; -constexpr uint8_t PHYCR0_10F = 0x06; -constexpr uint8_t PHYCR0_10H = 0x07; -constexpr uint8_t PHYCR1_PWDN = 1 << 5; -constexpr uint8_t PHYCR1_TE = 1 << 3; -constexpr uint8_t PHYCR1_RST = 1 << 0; -constexpr uint8_t NETX_MR_UNRB = 1 << 3; -constexpr uint8_t NETX_MR_PARP = 1 << 2; -constexpr uint8_t NETX_MR_RSTB = 1 << 1; -constexpr uint8_t NETX_MR_PB = 1 << 0; -constexpr uint8_t NETMR_ANB = 1 << 5; -constexpr uint8_t NETMR_M6B = 1 << 4; -constexpr uint8_t NETMR_WOL = 1 << 2; -constexpr uint8_t NETMR_IP6B = 1 << 1; -constexpr uint8_t NETMR_IP4B = 1 << 0; -constexpr uint8_t NETMR2_DHAS = 1 << 7; -constexpr uint8_t NETMR2_DHAS_ARP = 1 << 7; -constexpr uint8_t NETMR2_DHAS_ETH = 0 << 7; -constexpr uint8_t NETMR2_PPPOE = 1 << 0; -constexpr uint8_t ICMP6BLKR_PING6 = 1 << 4; -constexpr uint8_t ICMP6BLKR_MLD = 1 << 3; -constexpr uint8_t ICMP6BLKR_RA = 1 << 2; -constexpr uint8_t ICMP6BLKR_NA = 1 << 1; -constexpr uint8_t ICMP6BLKR_NS = 1 << 0; constexpr uint8_t SN_MR_MULTI = 1 << 7; -constexpr uint8_t SN_MR_MF = 1 << 7; -constexpr uint8_t SN_MR_BRDB = 1 << 6; -constexpr uint8_t SN_MR_FPSH = 1 << 6; -constexpr uint8_t SN_MR_ND = 1 << 5; -constexpr uint8_t SN_MR_MC = 1 << 5; -constexpr uint8_t SN_MR_SMB = 1 << 5; -constexpr uint8_t SN_MR_MMB = 1 << 5; -constexpr uint8_t SN_MR_MMB4 = SN_MR_MMB; constexpr uint8_t SN_MR_UNIB = 1 << 4; -constexpr uint8_t SN_MR_MMB6 = 1 << 4; -constexpr uint8_t SN_MR_CLOSE = 0x00; constexpr uint8_t SN_MR_TCP = 0x01; constexpr uint8_t SN_MR_TCP4 = SN_MR_TCP; constexpr uint8_t SN_MR_UDP = 0x02; @@ -486,75 +303,16 @@ constexpr uint8_t SN_MR_UDP6 = 0x0A; constexpr uint8_t SN_MR_IPRAW6 = 0x0B; constexpr uint8_t SN_MR_TCPD = 0x0D; constexpr uint8_t SN_MR_UDPD = 0x0E; +constexpr uint8_t SN_MR2_DHAM = 1 << 1; +constexpr uint8_t SN_MR2_FARP = 1 << 0; constexpr uint8_t SN_CR_OPEN = 0x01; -constexpr uint8_t SN_CR_LISTEN = 0x02; -constexpr uint8_t SN_CR_CONNECT = 0x04; -constexpr uint8_t SN_CR_CONNECT6 = 0x84; -constexpr uint8_t SN_CR_DISCON = 0x08; constexpr uint8_t SN_CR_CLOSE = 0x10; constexpr uint8_t SN_CR_SEND = 0x20; constexpr uint8_t SN_CR_SEND6 = 0xA0; -constexpr uint8_t SN_CR_SEND_KEEP = 0x22; constexpr uint8_t SN_CR_RECV = 0x40; constexpr uint8_t SN_IR_SENDOK = 0x10; constexpr uint8_t SN_IR_TIMEOUT = 0x08; -constexpr uint8_t SN_IR_RECV = 0x04; -constexpr uint8_t SN_IR_DISCON = 0x02; -constexpr uint8_t SN_IR_CON = 0x01; constexpr uint8_t SOCK_CLOSED = 0x00; -constexpr uint8_t SOCK_INIT = 0x13; -constexpr uint8_t SOCK_LISTEN = 0x14; -constexpr uint8_t SOCK_SYNSENT = 0x15; -constexpr uint8_t SOCK_SYNRECV = 0x16; -constexpr uint8_t SOCK_ESTABLISHED = 0x17; -constexpr uint8_t SOCK_FIN_WAIT = 0x18; -constexpr uint8_t SOCK_TIME_WAIT = 0x1B; -constexpr uint8_t SOCK_CLOSE_WAIT = 0x1C; -constexpr uint8_t SOCK_LAST_ACK = 0x1D; -constexpr uint8_t SOCK_UDP = 0x22; -constexpr uint8_t SOCK_IPRAW4 = 0x32; -constexpr uint8_t SOCK_IPRAW = SOCK_IPRAW4; -constexpr uint8_t SOCK_IPRAW6 = 0x33; -constexpr uint8_t SOCK_MACRAW = 0x42; -constexpr uint8_t SN_ESR_TCPM = 1 << 2; -constexpr uint8_t SN_ESR_TCPM_IPV4 = 0 << 2; -constexpr uint8_t SN_ESR_TCPM_IPV6 = 1 << 2; -constexpr uint8_t SN_ESR_TCPOP = 1 << 1; -constexpr uint8_t SN_ESR_TCPOP_SVR = 0 << 1; -constexpr uint8_t SN_ESR_TCPOP_CLT = 1 << 1; -constexpr uint8_t SN_ESR_IP6T = 1 << 0; -constexpr uint8_t SN_ESR_IP6T_LLA = 0 << 0; -constexpr uint8_t SN_ESR_IP6T_GUA = 1 << 0; -constexpr uint8_t SN_MR2_DHAM = 1 << 1; -constexpr uint8_t SN_MR2_DHAM_AUTO = 0 << 1; -constexpr uint8_t SN_MR2_DHAM_MANUAL = 1 << 1; -constexpr uint8_t SN_MR2_FARP = 1 << 0; -constexpr uint8_t PHYRAR_BMCR = 0x00; -constexpr uint8_t PHYRAR_BMSR = 0x01; -constexpr uint16_t BMCR_RST = 1 << 15; -constexpr uint16_t BMCR_LB = 1 << 14; -constexpr uint16_t BMCR_SPD = 1 << 13; -constexpr uint16_t BMCR_ANE = 1 << 12; -constexpr uint16_t BMCR_PWDN = 1 << 11; -constexpr uint16_t BMCR_ISOL = 1 << 10; -constexpr uint16_t BMCR_REAN = 1 << 9; -constexpr uint16_t BMCR_DPX = 1 << 8; -constexpr uint16_t BMCR_COLT = 1 << 7; -constexpr uint16_t BMSR_100_T4 = 1 << 15; -constexpr uint16_t BMSR_100_FDX = 1 << 14; -constexpr uint16_t BMSR_100_HDX = 1 << 13; -constexpr uint16_t BMSR_10_FDX = 1 << 12; -constexpr uint16_t BMSR_10_HDX = 1 << 11; -constexpr uint16_t BMSR_MF_SUP = 1 << 6; -constexpr uint16_t BMSR_AN_COMP = 1 << 5; -constexpr uint16_t BMSR_REMOTE_FAULT = 1 << 4; -constexpr uint16_t BMSR_AN_ABILITY = 1 << 3; -constexpr uint16_t BMSR_LINK_STATUS = 1 << 2; -constexpr uint16_t BMSR_JABBER_DETECT = 1 << 1; -constexpr uint16_t BMSR_EXT_CAPA = 1 << 0; - -void cris_enter(); -void cris_exit(); uint8_t reg_read(uint32_t addr_sel); void reg_write(uint32_t addr_sel, uint8_t wb); @@ -631,14 +389,6 @@ void set_sn_rx_rd(uint8_t sn, uint16_t v) { reg_write(offset_inc(REG_SN_RX_RD(sn), 1), (uint8_t)v); } uint16_t get_sn_rx_rd(uint8_t sn) { return ((uint16_t)reg_read(REG_SN_RX_RD(sn)) << 8) + reg_read(offset_inc(REG_SN_RX_RD(sn), 1)); } -static critical_section_t g_cris_sec; - -void cris_enter() { -} - -void cris_exit() { -} - static uint8_t make_opcode(uint32_t addr, uint8_t rw) { return static_cast((addr & 0xFF) | rw | QSPI_MODE); } @@ -648,37 +398,29 @@ static uint16_t make_addr(uint32_t addr) { } void reg_write(uint32_t addr_sel, uint8_t wb) { - cris_enter(); pio_frame_start(); pio_write(make_opcode(addr_sel, SPI_WRITE), make_addr(addr_sel), &wb, 1); pio_frame_end(); - cris_exit(); } uint8_t reg_read(uint32_t addr_sel) { uint8_t ret[2] = {0}; - cris_enter(); pio_frame_start(); pio_read(make_opcode(addr_sel, SPI_READ), make_addr(addr_sel), ret, 1); pio_frame_end(); - cris_exit(); return ret[0]; } void reg_write_buf(uint32_t addr_sel, uint8_t* buf, datasize_t len) { - cris_enter(); pio_frame_start(); pio_write(make_opcode(addr_sel, SPI_WRITE), make_addr(addr_sel), buf, len); pio_frame_end(); - cris_exit(); } void reg_read_buf(uint32_t addr_sel, uint8_t* buf, datasize_t len) { - cris_enter(); pio_frame_start(); pio_read(make_opcode(addr_sel, SPI_READ), make_addr(addr_sel), buf, len); pio_frame_end(); - cris_exit(); } uint16_t get_sn_tx_fsr(uint8_t sn) { @@ -1063,10 +805,6 @@ void init_spi() { pio_init(); } -void init_critical_section() { - critical_section_init(&g_cris_sec); -} - void init() { pio_frame_end(); std::array txsize = {4, 4, 4, 4, 4, 4, 4, 4}; diff --git a/firmware/w6300/w6300.h b/firmware/w6300/w6300.h index a62e078..eb9d5af 100644 --- a/firmware/w6300/w6300.h +++ b/firmware/w6300/w6300.h @@ -87,7 +87,6 @@ struct ip_address { }; void init_spi(); -void init_critical_section(); void reset(); void init(); bool check();