Hide internal W6300 symbols with anonymous namespace
This commit is contained in:
Ian Gulliver
636
w6300/w6300.cpp
636
w6300/w6300.cpp
@@ -2,9 +2,575 @@
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#include <cstring>
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#include "pico/stdlib.h"
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#include "pico/critical_section.h"
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#include "w6300_internal.h"
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#include "w6300.h"
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#include "pio.h"
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namespace {
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constexpr int _WIZCHIP_ = 6300;
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constexpr uint8_t _WIZCHIP_QSPI_MODE_ = 0x02 << 6;
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constexpr int _WIZCHIP_SOCK_NUM_ = WIZCHIP_SOCK_NUM;
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constexpr uint16_t _PHY_IO_MODE_PHYCR_ = 0x0000;
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constexpr uint16_t _PHY_IO_MODE_MII_ = 0x0010;
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constexpr uint16_t _PHY_IO_MODE_ = _PHY_IO_MODE_MII_;
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constexpr uint8_t W6300_SPI_READ = (0x00 << 5);
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constexpr uint8_t W6300_SPI_WRITE = (0x01 << 5);
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constexpr uint32_t WIZCHIP_CREG_BLOCK = 0x00;
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constexpr uint32_t WIZCHIP_SREG_BLOCK(uint8_t n) { return 1 + 4 * n; }
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constexpr uint32_t WIZCHIP_TXBUF_BLOCK(uint8_t n) { return 2 + 4 * n; }
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constexpr uint32_t WIZCHIP_RXBUF_BLOCK(uint8_t n) { return 3 + 4 * n; }
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constexpr uint32_t WIZCHIP_OFFSET_INC(uint32_t addr, uint32_t n) { return addr + (n << 8); }
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constexpr uint32_t _CIDR_ = (0x0000 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _RTL_ = (0x0004 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _VER_ = (0x0002 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SYSR_ = (0x2000 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SYCR0_ = (0x2004 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SYCR1_ = WIZCHIP_OFFSET_INC(_SYCR0_, 1);
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constexpr uint32_t _TCNTR_ = (0x2016 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _TCNTRCLR_ = (0x2020 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _IR_ = (0x2100 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SIR_ = (0x2101 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLIR_ = (0x2102 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _IMR_ = (0x2104 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _IRCLR_ = (0x2108 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SIMR_ = (0x2114 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLIMR_ = (0x2124 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLIRCLR_ = (0x2128 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLPSR_ = (0x212C << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLCR_ = (0x2130 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYSR_ = (0x3000 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYRAR_ = (0x3008 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYDIR_ = (0x300C << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYDOR_ = (0x3010 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYACR_ = (0x3014 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYDIVR_ = (0x3018 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYCR0_ = (0x301C << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYCR1_ = WIZCHIP_OFFSET_INC(_PHYCR0_, 1);
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constexpr uint32_t _NET4MR_ = (0x4000 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _NET6MR_ = (0x4004 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _NETMR_ = (0x4008 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _NETMR2_ = (0x4009 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PTMR_ = (0x4100 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PMNR_ = (0x4104 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHAR_ = (0x4108 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PSIDR_ = (0x4110 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PMRUR_ = (0x4114 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SHAR_ = (0x4120 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _GAR_ = (0x4130 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _GA4R_ = _GAR_;
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constexpr uint32_t _SUBR_ = (0x4134 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SUB4R_ = _SUBR_;
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constexpr uint32_t _SIPR_ = (0x4138 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SIP4R_ = _SIPR_;
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constexpr uint32_t _LLAR_ = (0x4140 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _GUAR_ = (0x4150 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SUB6R_ = (0x4160 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _GA6R_ = (0x4170 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLDIP6R_ = (0x4180 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLDIPR_ = (0x418C << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLDIP4R_ = _SLDIPR_;
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constexpr uint32_t _SLDHAR_ = (0x4190 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PINGIDR_ = (0x4198 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PINGSEQR_ = (0x419C << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _UIPR_ = (0x41A0 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _UIP4R_ = _UIPR_;
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constexpr uint32_t _UPORTR_ = (0x41A4 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _UPORT4R_ = _UPORTR_;
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constexpr uint32_t _UIP6R_ = (0x41B0 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _UPORT6R_ = (0x41C0 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _INTPTMR_ = (0x41C5 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PLR_ = (0x41D0 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PFR_ = (0x41D4 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _VLTR_ = (0x41D8 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PLTR_ = (0x41DC << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PAR_ = (0x41E0 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _ICMP6BLKR_ = (0x41F0 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _CHPLCKR_ = (0x41F4 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _NETLCKR_ = (0x41F5 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _PHYLCKR_ = (0x41F6 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _RTR_ = (0x4200 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _RCR_ = (0x4204 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLRTR_ = (0x4208 << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLRCR_ = (0x420C << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _SLHOPR_ = (0x420F << 8) + WIZCHIP_CREG_BLOCK;
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constexpr uint32_t _Sn_MR_(uint8_t n) { return (0x0000 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_PSR_(uint8_t n) { return (0x0004 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_CR_(uint8_t n) { return (0x0010 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_IR_(uint8_t n) { return (0x0020 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_IMR_(uint8_t n) { return (0x0024 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_IRCLR_(uint8_t n) { return (0x0028 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_SR_(uint8_t n) { return (0x0030 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_ESR_(uint8_t n) { return (0x0031 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_PNR_(uint8_t n) { return (0x0100 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_NHR_(uint8_t n) { return _Sn_PNR_(n); }
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constexpr uint32_t _Sn_TOSR_(uint8_t n) { return (0x0104 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_TTLR_(uint8_t n) { return (0x0108 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_HOPR_(uint8_t n) { return _Sn_TTLR_(n); }
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constexpr uint32_t _Sn_FRGR_(uint8_t n) { return (0x010C << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_MSSR_(uint8_t n) { return (0x0110 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_PORTR_(uint8_t n) { return (0x0114 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_DHAR_(uint8_t n) { return (0x0118 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_DIPR_(uint8_t n) { return (0x0120 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_DIP4R_(uint8_t n) { return _Sn_DIPR_(n); }
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constexpr uint32_t _Sn_DIP6R_(uint8_t n) { return (0x0130 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_DPORTR_(uint8_t n) { return (0x0140 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_MR2_(uint8_t n) { return (0x0144 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_RTR_(uint8_t n) { return (0x0180 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_RCR_(uint8_t n) { return (0x0184 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_KPALVTR_(uint8_t n) { return (0x0188 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_TX_BSR_(uint8_t n) { return (0x0200 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_TX_FSR_(uint8_t n) { return (0x0204 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_TX_RD_(uint8_t n) { return (0x0208 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_TX_WR_(uint8_t n) { return (0x020C << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_RX_BSR_(uint8_t n) { return (0x0220 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_RX_RSR_(uint8_t n) { return (0x0224 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_RX_RD_(uint8_t n) { return (0x0228 << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint32_t _Sn_RX_WR_(uint8_t n) { return (0x022C << 8) + WIZCHIP_SREG_BLOCK(n); }
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constexpr uint8_t SYSR_CHPL = 1 << 7;
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constexpr uint8_t SYSR_NETL = 1 << 6;
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constexpr uint8_t SYSR_PHYL = 1 << 5;
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constexpr uint8_t SYSR_IND = 1 << 5;
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constexpr uint8_t SYSR_SPI = 1 << 0;
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constexpr uint8_t SYCR0_RST = 0x00;
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constexpr uint8_t SYCR1_IEN = 1 << 7;
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constexpr uint8_t SYCR1_CLKSEL = 1 << 0;
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constexpr uint8_t SYCR1_CLKSEL_25M = 1;
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constexpr uint8_t SYCR1_CLKSEL_100M = 0;
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constexpr uint8_t IR_WOL = 1 << 7;
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constexpr uint8_t IR_UNR6 = 1 << 4;
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constexpr uint8_t IR_IPCONF = 1 << 2;
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constexpr uint8_t IR_UNR4 = 1 << 1;
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constexpr uint8_t IR_PTERM = 1 << 0;
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constexpr uint8_t SIR_INT(uint8_t n) { return 1 << n; }
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constexpr uint8_t SLIR_TOUT = 1 << 7;
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constexpr uint8_t SLIR_ARP4 = 1 << 6;
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constexpr uint8_t SLIR_PING4 = 1 << 5;
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constexpr uint8_t SLIR_ARP6 = 1 << 4;
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constexpr uint8_t SLIR_PING6 = 1 << 3;
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constexpr uint8_t SLIR_NS = 1 << 2;
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constexpr uint8_t SLIR_RS = 1 << 1;
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constexpr uint8_t SLIR_RA = 1 << 0;
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constexpr uint8_t PSR_AUTO = 0x00;
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constexpr uint8_t PSR_LLA = 0x02;
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constexpr uint8_t PSR_GUA = 0x03;
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constexpr uint8_t SLCR_ARP4 = 1 << 6;
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constexpr uint8_t SLCR_PING4 = 1 << 5;
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constexpr uint8_t SLCR_ARP6 = 1 << 4;
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constexpr uint8_t SLCR_PING6 = 1 << 3;
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constexpr uint8_t SLCR_NS = 1 << 2;
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constexpr uint8_t SLCR_RS = 1 << 1;
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constexpr uint8_t SLCR_UNA = 1 << 0;
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constexpr uint8_t PHYSR_CAB = 1 << 7;
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constexpr uint8_t PHYSR_CAB_OFF = 1 << 7;
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constexpr uint8_t PHYSR_CAB_ON = 0 << 7;
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constexpr uint8_t PHYSR_MODE = 7 << 3;
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constexpr uint8_t PHYSR_MODE_AUTO = 0 << 3;
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constexpr uint8_t PHYSR_MODE_100F = 4 << 3;
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constexpr uint8_t PHYSR_MODE_100H = 5 << 3;
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constexpr uint8_t PHYSR_MODE_10F = 6 << 3;
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constexpr uint8_t PHYSR_MODE_10H = 7 << 3;
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constexpr uint8_t PHYSR_DPX = 1 << 2;
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constexpr uint8_t PHYSR_DPX_HALF = 1 << 2;
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constexpr uint8_t PHYSR_DPX_FULL = 0 << 2;
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constexpr uint8_t PHYSR_SPD = 1 << 1;
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constexpr uint8_t PHYSR_SPD_10M = 1 << 1;
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constexpr uint8_t PHYSR_SPD_100M = 0 << 1;
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constexpr uint8_t PHYSR_LNK = 1 << 0;
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constexpr uint8_t PHYSR_LNK_UP = 1 << 0;
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constexpr uint8_t PHYSR_LNK_DOWN = 0 << 0;
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constexpr uint8_t PHYACR_READ = 0x02;
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constexpr uint8_t PHYACR_WRITE = 0x01;
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constexpr uint8_t PHYDIVR_32 = 0x00;
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constexpr uint8_t PHYDIVR_64 = 0x01;
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constexpr uint8_t PHYDIVR_128 = 0xFF;
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constexpr uint8_t PHYCR0_AUTO = 0x00;
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constexpr uint8_t PHYCR0_100F = 0x04;
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constexpr uint8_t PHYCR0_100H = 0x05;
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constexpr uint8_t PHYCR0_10F = 0x06;
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constexpr uint8_t PHYCR0_10H = 0x07;
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constexpr uint8_t PHYCR1_PWDN = 1 << 5;
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constexpr uint8_t PHYCR1_TE = 1 << 3;
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constexpr uint8_t PHYCR1_RST = 1 << 0;
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constexpr uint8_t NETxMR_UNRB = 1 << 3;
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constexpr uint8_t NETxMR_PARP = 1 << 2;
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constexpr uint8_t NETxMR_RSTB = 1 << 1;
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constexpr uint8_t NETxMR_PB = 1 << 0;
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constexpr uint8_t NETMR_ANB = 1 << 5;
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constexpr uint8_t NETMR_M6B = 1 << 4;
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constexpr uint8_t NETMR_WOL = 1 << 2;
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constexpr uint8_t NETMR_IP6B = 1 << 1;
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constexpr uint8_t NETMR_IP4B = 1 << 0;
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constexpr uint8_t NETMR2_DHAS = 1 << 7;
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constexpr uint8_t NETMR2_DHAS_ARP = 1 << 7;
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constexpr uint8_t NETMR2_DHAS_ETH = 0 << 7;
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constexpr uint8_t NETMR2_PPPoE = 1 << 0;
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constexpr uint8_t ICMP6BLKR_PING6 = 1 << 4;
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constexpr uint8_t ICMP6BLKR_MLD = 1 << 3;
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constexpr uint8_t ICMP6BLKR_RA = 1 << 2;
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constexpr uint8_t ICMP6BLKR_NA = 1 << 1;
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constexpr uint8_t ICMP6BLKR_NS = 1 << 0;
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constexpr uint8_t Sn_MR_MULTI = 1 << 7;
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constexpr uint8_t Sn_MR_MF = 1 << 7;
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constexpr uint8_t Sn_MR_BRDB = 1 << 6;
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constexpr uint8_t Sn_MR_FPSH = 1 << 6;
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constexpr uint8_t Sn_MR_ND = 1 << 5;
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constexpr uint8_t Sn_MR_MC = 1 << 5;
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constexpr uint8_t Sn_MR_SMB = 1 << 5;
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constexpr uint8_t Sn_MR_MMB = 1 << 5;
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constexpr uint8_t Sn_MR_MMB4 = Sn_MR_MMB;
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constexpr uint8_t Sn_MR_UNIB = 1 << 4;
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constexpr uint8_t Sn_MR_MMB6 = 1 << 4;
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constexpr uint8_t Sn_MR_CLOSE = 0x00;
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constexpr uint8_t Sn_MR_TCP = 0x01;
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constexpr uint8_t Sn_MR_TCP4 = Sn_MR_TCP;
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constexpr uint8_t Sn_MR_UDP = 0x02;
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constexpr uint8_t Sn_MR_UDP4 = Sn_MR_UDP;
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constexpr uint8_t Sn_MR_IPRAW = 0x03;
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constexpr uint8_t Sn_MR_IPRAW4 = Sn_MR_IPRAW;
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constexpr uint8_t Sn_MR_MACRAW = 0x07;
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constexpr uint8_t Sn_MR_TCP6 = 0x09;
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constexpr uint8_t Sn_MR_UDP6 = 0x0A;
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constexpr uint8_t Sn_MR_IPRAW6 = 0x0B;
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constexpr uint8_t Sn_MR_TCPD = 0x0D;
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constexpr uint8_t Sn_MR_UDPD = 0x0E;
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constexpr uint8_t Sn_CR_OPEN = 0x01;
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constexpr uint8_t Sn_CR_LISTEN = 0x02;
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constexpr uint8_t Sn_CR_CONNECT = 0x04;
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constexpr uint8_t Sn_CR_CONNECT6 = 0x84;
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constexpr uint8_t Sn_CR_DISCON = 0x08;
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constexpr uint8_t Sn_CR_CLOSE = 0x10;
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constexpr uint8_t Sn_CR_SEND = 0x20;
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||||
constexpr uint8_t Sn_CR_SEND6 = 0xA0;
|
||||
constexpr uint8_t Sn_CR_SEND_KEEP = 0x22;
|
||||
constexpr uint8_t Sn_CR_RECV = 0x40;
|
||||
constexpr uint8_t Sn_IR_SENDOK = 0x10;
|
||||
constexpr uint8_t Sn_IR_TIMEOUT = 0x08;
|
||||
constexpr uint8_t Sn_IR_RECV = 0x04;
|
||||
constexpr uint8_t Sn_IR_DISCON = 0x02;
|
||||
constexpr uint8_t Sn_IR_CON = 0x01;
|
||||
constexpr uint8_t SOCK_CLOSED = 0x00;
|
||||
constexpr uint8_t SOCK_INIT = 0x13;
|
||||
constexpr uint8_t SOCK_LISTEN = 0x14;
|
||||
constexpr uint8_t SOCK_SYNSENT = 0x15;
|
||||
constexpr uint8_t SOCK_SYNRECV = 0x16;
|
||||
constexpr uint8_t SOCK_ESTABLISHED = 0x17;
|
||||
constexpr uint8_t SOCK_FIN_WAIT = 0x18;
|
||||
constexpr uint8_t SOCK_TIME_WAIT = 0x1B;
|
||||
constexpr uint8_t SOCK_CLOSE_WAIT = 0x1C;
|
||||
constexpr uint8_t SOCK_LAST_ACK = 0x1D;
|
||||
constexpr uint8_t SOCK_UDP = 0x22;
|
||||
constexpr uint8_t SOCK_IPRAW4 = 0x32;
|
||||
constexpr uint8_t SOCK_IPRAW = SOCK_IPRAW4;
|
||||
constexpr uint8_t SOCK_IPRAW6 = 0x33;
|
||||
constexpr uint8_t SOCK_MACRAW = 0x42;
|
||||
constexpr uint8_t Sn_ESR_TCPM = 1 << 2;
|
||||
constexpr uint8_t Sn_ESR_TCPM_IPV4 = 0 << 2;
|
||||
constexpr uint8_t Sn_ESR_TCPM_IPV6 = 1 << 2;
|
||||
constexpr uint8_t Sn_ESR_TCPOP = 1 << 1;
|
||||
constexpr uint8_t Sn_ESR_TCPOP_SVR = 0 << 1;
|
||||
constexpr uint8_t Sn_ESR_TCPOP_CLT = 1 << 1;
|
||||
constexpr uint8_t Sn_ESR_IP6T = 1 << 0;
|
||||
constexpr uint8_t Sn_ESR_IP6T_LLA = 0 << 0;
|
||||
constexpr uint8_t Sn_ESR_IP6T_GUA = 1 << 0;
|
||||
constexpr uint8_t Sn_MR2_DHAM = 1 << 1;
|
||||
constexpr uint8_t Sn_MR2_DHAM_AUTO = 0 << 1;
|
||||
constexpr uint8_t Sn_MR2_DHAM_MANUAL = 1 << 1;
|
||||
constexpr uint8_t Sn_MR2_FARP = 1 << 0;
|
||||
constexpr uint8_t PHYRAR_BMCR = 0x00;
|
||||
constexpr uint8_t PHYRAR_BMSR = 0x01;
|
||||
constexpr uint16_t BMCR_RST = 1 << 15;
|
||||
constexpr uint16_t BMCR_LB = 1 << 14;
|
||||
constexpr uint16_t BMCR_SPD = 1 << 13;
|
||||
constexpr uint16_t BMCR_ANE = 1 << 12;
|
||||
constexpr uint16_t BMCR_PWDN = 1 << 11;
|
||||
constexpr uint16_t BMCR_ISOL = 1 << 10;
|
||||
constexpr uint16_t BMCR_REAN = 1 << 9;
|
||||
constexpr uint16_t BMCR_DPX = 1 << 8;
|
||||
constexpr uint16_t BMCR_COLT = 1 << 7;
|
||||
constexpr uint16_t BMSR_100_T4 = 1 << 15;
|
||||
constexpr uint16_t BMSR_100_FDX = 1 << 14;
|
||||
constexpr uint16_t BMSR_100_HDX = 1 << 13;
|
||||
constexpr uint16_t BMSR_10_FDX = 1 << 12;
|
||||
constexpr uint16_t BMSR_10_HDX = 1 << 11;
|
||||
constexpr uint16_t BMSR_MF_SUP = 1 << 6;
|
||||
constexpr uint16_t BMSR_AN_COMP = 1 << 5;
|
||||
constexpr uint16_t BMSR_REMOTE_FAULT = 1 << 4;
|
||||
constexpr uint16_t BMSR_AN_ABILITY = 1 << 3;
|
||||
constexpr uint16_t BMSR_LINK_STATUS = 1 << 2;
|
||||
constexpr uint16_t BMSR_JABBER_DETECT = 1 << 1;
|
||||
constexpr uint16_t BMSR_EXT_CAPA = 1 << 0;
|
||||
|
||||
void wizchip_cris_enter();
|
||||
void wizchip_cris_exit();
|
||||
inline void WIZCHIP_CRITICAL_ENTER() { wizchip_cris_enter(); }
|
||||
inline void WIZCHIP_CRITICAL_EXIT() { wizchip_cris_exit(); }
|
||||
|
||||
uint8_t WIZCHIP_READ(uint32_t AddrSel);
|
||||
void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb);
|
||||
void WIZCHIP_READ_BUF(uint32_t AddrSel, uint8_t* pBuf, datasize_t len);
|
||||
void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, datasize_t len);
|
||||
uint16_t getSn_TX_FSR(uint8_t sn);
|
||||
uint16_t getSn_RX_RSR(uint8_t sn);
|
||||
|
||||
inline uint8_t getRTL() { return WIZCHIP_READ(_RTL_); }
|
||||
inline uint16_t getCIDR() { return (((uint16_t)WIZCHIP_READ(_CIDR_) | (((WIZCHIP_READ(_RTL_)) & 0x0F) << 1)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_CIDR_, 1)); }
|
||||
inline uint16_t getVER() { return (((uint16_t)WIZCHIP_READ(_VER_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_VER_, 1)); }
|
||||
inline uint8_t getSYSR() { return WIZCHIP_READ(_SYSR_); }
|
||||
inline uint8_t getSYCR0() { return WIZCHIP_READ(_SYCR0_); }
|
||||
inline void setSYCR0(uint8_t v) { WIZCHIP_WRITE(_SYCR0_, v); }
|
||||
inline uint8_t getSYCR1() { return WIZCHIP_READ(_SYCR1_); }
|
||||
inline void setSYCR1(uint8_t v) { WIZCHIP_WRITE(_SYCR1_, v); }
|
||||
inline uint16_t getTCNTR() { return (((uint16_t)WIZCHIP_READ(_TCNTR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_TCNTR_, 1)); }
|
||||
inline void setTCNTRCLR(uint8_t v) { WIZCHIP_WRITE(_TCNTRCLR_, v); }
|
||||
inline uint8_t getIR() { return WIZCHIP_READ(_IR_); }
|
||||
inline uint8_t getSIR() { return WIZCHIP_READ(_SIR_); }
|
||||
inline uint8_t getSLIR() { return WIZCHIP_READ(_SLIR_); }
|
||||
inline void setIMR(uint8_t v) { WIZCHIP_WRITE(_IMR_, v); }
|
||||
inline uint8_t getIMR() { return WIZCHIP_READ(_IMR_); }
|
||||
inline void setIRCLR(uint8_t v) { WIZCHIP_WRITE(_IRCLR_, v); }
|
||||
inline void setIR(uint8_t v) { setIRCLR(v); }
|
||||
inline void setSIMR(uint8_t v) { WIZCHIP_WRITE(_SIMR_, v); }
|
||||
inline uint8_t getSIMR() { return WIZCHIP_READ(_SIMR_); }
|
||||
inline void setSLIMR(uint8_t v) { WIZCHIP_WRITE(_SLIMR_, v); }
|
||||
inline uint8_t getSLIMR() { return WIZCHIP_READ(_SLIMR_); }
|
||||
inline void setSLIRCLR(uint8_t v) { WIZCHIP_WRITE(_SLIRCLR_, v); }
|
||||
inline void setSLIR(uint8_t v) { setSLIRCLR(v); }
|
||||
inline void setSLPSR(uint8_t v) { WIZCHIP_WRITE(_SLPSR_, v); }
|
||||
inline uint8_t getSLPSR() { return WIZCHIP_READ(_SLPSR_); }
|
||||
inline void setSLCR(uint8_t v) { WIZCHIP_WRITE(_SLCR_, v); }
|
||||
inline uint8_t getSLCR() { return WIZCHIP_READ(_SLCR_); }
|
||||
inline uint8_t getPHYSR() { return WIZCHIP_READ(_PHYSR_); }
|
||||
inline void setPHYRAR(uint8_t v) { WIZCHIP_WRITE(_PHYRAR_, v); }
|
||||
inline uint8_t getPHYRAR() { return WIZCHIP_READ(_PHYRAR_); }
|
||||
inline void setPHYDIR(uint16_t v) {
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_PHYDIR_, 1), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(_PHYDIR_, (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getPHYDOR() { return (((uint16_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PHYDOR_, 1))) << 8) + WIZCHIP_READ(_PHYDOR_); }
|
||||
inline void setPHYACR(uint8_t v) { WIZCHIP_WRITE(_PHYACR_, v); }
|
||||
inline uint8_t getPHYACR() { return WIZCHIP_READ(_PHYACR_); }
|
||||
inline void setPHYDIVR(uint8_t v) { WIZCHIP_WRITE(_PHYDIVR_, v); }
|
||||
inline uint8_t getPHYDIVR() { return WIZCHIP_READ(_PHYDIVR_); }
|
||||
inline void setPHYCR0(uint8_t v) { WIZCHIP_WRITE(_PHYCR0_, v); }
|
||||
inline void setPHYCR1(uint8_t v) { WIZCHIP_WRITE(_PHYCR1_, v); }
|
||||
inline uint8_t getPHYCR1() { return WIZCHIP_READ(_PHYCR1_); }
|
||||
inline void setNET4MR(uint8_t v) { WIZCHIP_WRITE(_NET4MR_, v); }
|
||||
inline void setNET6MR(uint8_t v) { WIZCHIP_WRITE(_NET6MR_, v); }
|
||||
inline void setNETMR(uint8_t v) { WIZCHIP_WRITE(_NETMR_, v); }
|
||||
inline void setNETMR2(uint8_t v) { WIZCHIP_WRITE(_NETMR2_, v); }
|
||||
inline uint8_t getNET4MR() { return WIZCHIP_READ(_NET4MR_); }
|
||||
inline uint8_t getNET6MR() { return WIZCHIP_READ(_NET6MR_); }
|
||||
inline uint8_t getNETMR() { return WIZCHIP_READ(_NETMR_); }
|
||||
inline uint8_t getNETMR2() { return WIZCHIP_READ(_NETMR2_); }
|
||||
inline void setPTMR(uint8_t v) { WIZCHIP_WRITE(_PTMR_, v); }
|
||||
inline uint8_t getPTMR() { return WIZCHIP_READ(_PTMR_); }
|
||||
inline void setPMNR(uint8_t v) { WIZCHIP_WRITE(_PMNR_, v); }
|
||||
inline uint8_t getPMNR() { return WIZCHIP_READ(_PMNR_); }
|
||||
inline void setPHAR(uint8_t* v) { WIZCHIP_WRITE_BUF(_PHAR_, v, 6); }
|
||||
inline void getPHAR(uint8_t* v) { WIZCHIP_READ_BUF(_PHAR_, v, 6); }
|
||||
inline void setPSIDR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_PSIDR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_PSIDR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getPSIDR() { return (((uint16_t)WIZCHIP_READ(_PSIDR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PSIDR_, 1)); }
|
||||
inline void setPMRUR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_PMRUR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_PMRUR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getPMRUR() { return (((uint16_t)WIZCHIP_READ(_PMRUR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PMRUR_, 1)); }
|
||||
inline void setSHAR(uint8_t* v) { WIZCHIP_WRITE_BUF(_SHAR_, v, 6); }
|
||||
inline void getSHAR(uint8_t* v) { WIZCHIP_READ_BUF(_SHAR_, v, 6); }
|
||||
inline void setGAR(uint8_t* v) { WIZCHIP_WRITE_BUF(_GAR_, v, 4); }
|
||||
inline void getGAR(uint8_t* v) { WIZCHIP_READ_BUF(_GAR_, v, 4); }
|
||||
inline void setGA4R(uint8_t* v) { setGAR(v); }
|
||||
inline void getGA4R(uint8_t* v) { getGAR(v); }
|
||||
inline void setSUBR(uint8_t* v) { WIZCHIP_WRITE_BUF(_SUBR_, v, 4); }
|
||||
inline void getSUBR(uint8_t* v) { WIZCHIP_READ_BUF(_SUBR_, v, 4); }
|
||||
inline void setSUB4R(uint8_t* v) { setSUBR(v); }
|
||||
inline void getSUB4R(uint8_t* v) { getSUBR(v); }
|
||||
inline void setSIPR(uint8_t* v) { WIZCHIP_WRITE_BUF(_SIPR_, v, 4); }
|
||||
inline void getSIPR(uint8_t* v) { WIZCHIP_READ_BUF(_SIPR_, v, 4); }
|
||||
inline void setLLAR(uint8_t* v) { WIZCHIP_WRITE_BUF(_LLAR_, v, 16); }
|
||||
inline void getLLAR(uint8_t* v) { WIZCHIP_READ_BUF(_LLAR_, v, 16); }
|
||||
inline void setGUAR(uint8_t* v) { WIZCHIP_WRITE_BUF(_GUAR_, v, 16); }
|
||||
inline void getGUAR(uint8_t* v) { WIZCHIP_READ_BUF(_GUAR_, v, 16); }
|
||||
inline void setSUB6R(uint8_t* v) { WIZCHIP_WRITE_BUF(_SUB6R_, v, 16); }
|
||||
inline void getSUB6R(uint8_t* v) { WIZCHIP_READ_BUF(_SUB6R_, v, 16); }
|
||||
inline void setGA6R(uint8_t* v) { WIZCHIP_WRITE_BUF(_GA6R_, v, 16); }
|
||||
inline void getGA6R(uint8_t* v) { WIZCHIP_READ_BUF(_GA6R_, v, 16); }
|
||||
inline void setSLDIPR(uint8_t* v) { WIZCHIP_WRITE_BUF(_SLDIPR_, v, 4); }
|
||||
inline void setSLDIP4R(uint8_t* v) { setSLDIPR(v); }
|
||||
inline void getSLDIPR(uint8_t* v) { WIZCHIP_READ_BUF(_SLDIPR_, v, 4); }
|
||||
inline void getSLDIP4R(uint8_t* v) { getSLDIPR(v); }
|
||||
inline void setSLDIP6R(uint8_t* v) { WIZCHIP_WRITE_BUF(_SLDIP6R_, v, 16); }
|
||||
inline void getSLDIP6R(uint8_t* v) { WIZCHIP_READ_BUF(_SLDIP6R_, v, 16); }
|
||||
inline void getSLDHAR(uint8_t* v) { WIZCHIP_READ_BUF(_SLDHAR_, v, 6); }
|
||||
inline void setPINGIDR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_PINGIDR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_PINGIDR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getPINGIDR() { return ((uint16_t)(WIZCHIP_READ(_PINGIDR_) << 8)) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PINGIDR_, 1)); }
|
||||
inline void setPINGSEQR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_PINGSEQR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_PINGSEQR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getPINGSEQR() { return ((uint16_t)(WIZCHIP_READ(_PINGSEQR_) << 8)) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PINGSEQR_, 1)); }
|
||||
inline void getUIPR(uint8_t* v) { WIZCHIP_READ_BUF(_UIPR_, v, 4); }
|
||||
inline void getUIP4R(uint8_t* v) { getUIPR(v); }
|
||||
inline uint16_t getUPORTR() { return (((uint16_t)WIZCHIP_READ(_UPORTR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_UPORTR_, 1)); }
|
||||
inline uint16_t getUPORT4R() { return getUPORTR(); }
|
||||
inline void getUIP6R(uint8_t* v) { WIZCHIP_READ_BUF(_UIP6R_, v, 16); }
|
||||
inline uint16_t getUPORT6R() { return (((uint16_t)WIZCHIP_READ(_UPORT6R_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_UPORT6R_, 1)); }
|
||||
inline void setINTPTMR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_INTPTMR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_INTPTMR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getINTPTMR() { return (((uint16_t)WIZCHIP_READ(_INTPTMR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_INTPTMR_, 1)); }
|
||||
inline uint8_t getPLR() { return WIZCHIP_READ(_PLR_); }
|
||||
inline uint8_t getPFR() { return WIZCHIP_READ(_PFR_); }
|
||||
inline uint32_t getVLTR() {
|
||||
return (((uint32_t)WIZCHIP_READ(_VLTR_)) << 24) +
|
||||
(((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_VLTR_, 1))) << 16) +
|
||||
(((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_VLTR_, 2))) << 8) +
|
||||
((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_VLTR_, 3)));
|
||||
}
|
||||
inline uint32_t getPLTR() {
|
||||
return (((uint32_t)WIZCHIP_READ(_PLTR_)) << 24) +
|
||||
(((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PLTR_, 1))) << 16) +
|
||||
(((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PLTR_, 2))) << 8) +
|
||||
((uint32_t)WIZCHIP_READ(WIZCHIP_OFFSET_INC(_PLTR_, 3)));
|
||||
}
|
||||
inline void getPAR(uint8_t* v) { WIZCHIP_READ_BUF(_PAR_, v, 16); }
|
||||
inline void setICMP6BLKR(uint8_t v) { WIZCHIP_WRITE(_ICMP6BLKR_, v); }
|
||||
inline uint8_t getICMP6BLKR() { return WIZCHIP_READ(_ICMP6BLKR_); }
|
||||
inline void setCHPLCKR(uint8_t v) { WIZCHIP_WRITE(_CHPLCKR_, v); }
|
||||
inline uint8_t getCHPLCKR() { return (getSYSR() & SYSR_CHPL) >> 7; }
|
||||
inline void CHIPLOCK() { setCHPLCKR(0xFF); }
|
||||
inline void CHIPUNLOCK() { setCHPLCKR(0xCE); }
|
||||
inline void setNETLCKR(uint8_t v) { WIZCHIP_WRITE(_NETLCKR_, v); }
|
||||
inline uint8_t getNETLCKR() { return (getSYSR() & SYSR_NETL) >> 6; }
|
||||
inline void NETLOCK() { setNETLCKR(0xC5); }
|
||||
inline void NETUNLOCK() { setNETLCKR(0x3A); }
|
||||
inline void setPHYLCKR(uint8_t v) { WIZCHIP_WRITE(_PHYLCKR_, v); }
|
||||
inline uint8_t getPHYLCKR() { return (getSYSR() & SYSR_PHYL) >> 5; }
|
||||
inline void PHYLOCK() { setPHYLCKR(0xFF); }
|
||||
inline void PHYUNLOCK() { setPHYLCKR(0x53); }
|
||||
inline void setRTR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_RTR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_RTR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getRTR() { return (((uint16_t)WIZCHIP_READ(_RTR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_RTR_, 1)); }
|
||||
inline void setRCR(uint8_t v) { WIZCHIP_WRITE(_RCR_, v); }
|
||||
inline uint8_t getRCR() { return WIZCHIP_READ(_RCR_); }
|
||||
inline void setSLRTR(uint16_t v) {
|
||||
WIZCHIP_WRITE(_SLRTR_, (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_SLRTR_, 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSLRTR() { return (((uint16_t)WIZCHIP_READ(_SLRTR_)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_SLRTR_, 1)); }
|
||||
inline void setSLRCR(uint8_t v) { WIZCHIP_WRITE(_SLRCR_, v); }
|
||||
inline uint8_t getSLRCR() { return WIZCHIP_READ(_SLRCR_); }
|
||||
inline void setSLHOPR(uint8_t v) { WIZCHIP_WRITE(_SLHOPR_, v); }
|
||||
inline uint8_t getSLHOPR() { return WIZCHIP_READ(_SLHOPR_); }
|
||||
|
||||
inline void setSn_MR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_MR_(sn), v); }
|
||||
inline uint8_t getSn_MR(uint8_t sn) { return WIZCHIP_READ(_Sn_MR_(sn)); }
|
||||
inline void setSn_PSR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_PSR_(sn), v); }
|
||||
inline uint8_t getSn_PSR(uint8_t sn) { return WIZCHIP_READ(_Sn_PSR_(sn)); }
|
||||
inline void setSn_CR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_CR_(sn), v); }
|
||||
inline uint8_t getSn_CR(uint8_t sn) { return WIZCHIP_READ(_Sn_CR_(sn)); }
|
||||
inline uint8_t getSn_IR(uint8_t sn) { return WIZCHIP_READ(_Sn_IR_(sn)); }
|
||||
inline void setSn_IMR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_IMR_(sn), v); }
|
||||
inline uint8_t getSn_IMR(uint8_t sn) { return WIZCHIP_READ(_Sn_IMR_(sn)); }
|
||||
inline void setSn_IRCLR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_IRCLR_(sn), v); }
|
||||
inline void setSn_IR(uint8_t sn, uint8_t v) { setSn_IRCLR(sn, v); }
|
||||
inline uint8_t getSn_SR(uint8_t sn) { return WIZCHIP_READ(_Sn_SR_(sn)); }
|
||||
inline uint8_t getSn_ESR(uint8_t sn) { return WIZCHIP_READ(_Sn_ESR_(sn)); }
|
||||
inline void setSn_PNR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_PNR_(sn), v); }
|
||||
inline void setSn_NHR(uint8_t sn, uint8_t v) { setSn_PNR(sn, v); }
|
||||
inline uint8_t getSn_PNR(uint8_t sn) { return WIZCHIP_READ(_Sn_PNR_(sn)); }
|
||||
inline uint8_t getSn_NHR(uint8_t sn) { return getSn_PNR(sn); }
|
||||
inline void setSn_TOSR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_TOSR_(sn), v); }
|
||||
inline uint8_t getSn_TOSR(uint8_t sn) { return WIZCHIP_READ(_Sn_TOSR_(sn)); }
|
||||
inline uint8_t getSn_TOS(uint8_t sn) { return getSn_TOSR(sn); }
|
||||
inline void setSn_TOS(uint8_t sn, uint8_t v) { setSn_TOSR(sn, v); }
|
||||
inline void setSn_TTLR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_TTLR_(sn), v); }
|
||||
inline uint8_t getSn_TTLR(uint8_t sn) { return WIZCHIP_READ(_Sn_TTLR_(sn)); }
|
||||
inline void setSn_TTL(uint8_t sn, uint8_t v) { setSn_TTLR(sn, v); }
|
||||
inline uint8_t getSn_TTL(uint8_t sn) { return getSn_TTLR(sn); }
|
||||
inline void setSn_HOPR(uint8_t sn, uint8_t v) { setSn_TTLR(sn, v); }
|
||||
inline uint8_t getSn_HOPR(uint8_t sn) { return getSn_TTLR(sn); }
|
||||
inline void setSn_FRGR(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_FRGR_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_FRGR_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_FRGR(uint8_t sn) { return (((uint16_t)WIZCHIP_READ(_Sn_FRGR_(sn))) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_FRGR_(sn), 1)); }
|
||||
inline void setSn_MSSR(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_MSSR_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_MSSR_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_MSSR(uint8_t sn) { return (((uint16_t)WIZCHIP_READ(_Sn_MSSR_(sn))) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_MSSR_(sn), 1)); }
|
||||
inline void setSn_PORTR(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_PORTR_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_PORTR_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_PORTR(uint8_t sn) { return (((uint16_t)WIZCHIP_READ(_Sn_PORTR_(sn))) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_PORTR_(sn), 1)); }
|
||||
inline void setSn_DHAR(uint8_t sn, uint8_t* v) { WIZCHIP_WRITE_BUF(_Sn_DHAR_(sn), v, 6); }
|
||||
inline void getSn_DHAR(uint8_t sn, uint8_t* v) { WIZCHIP_READ_BUF(_Sn_DHAR_(sn), v, 6); }
|
||||
inline void setSn_DIPR(uint8_t sn, uint8_t* v) { WIZCHIP_WRITE_BUF(_Sn_DIPR_(sn), v, 4); }
|
||||
inline void getSn_DIPR(uint8_t sn, uint8_t* v) { WIZCHIP_READ_BUF(_Sn_DIPR_(sn), v, 4); }
|
||||
inline void setSn_DIP4R(uint8_t sn, uint8_t* v) { setSn_DIPR(sn, v); }
|
||||
inline void getSn_DIP4R(uint8_t sn, uint8_t* v) { getSn_DIPR(sn, v); }
|
||||
inline void setSn_DIP6R(uint8_t sn, uint8_t* v) { WIZCHIP_WRITE_BUF(_Sn_DIP6R_(sn), v, 16); }
|
||||
inline void getSn_DIP6R(uint8_t sn, uint8_t* v) { WIZCHIP_READ_BUF(_Sn_DIP6R_(sn), v, 16); }
|
||||
inline void setSn_DPORTR(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_DPORTR_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_DPORTR_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_DPORTR(uint8_t sn) { return (((uint16_t)WIZCHIP_READ(_Sn_DPORTR_(sn))) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_DPORTR_(sn), 1)); }
|
||||
inline uint16_t getSn_DPORT(uint8_t sn) { return getSn_DPORTR(sn); }
|
||||
inline void setSn_DPORT(uint8_t sn, uint16_t v) { setSn_DPORTR(sn, v); }
|
||||
inline void setSn_MR2(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_MR2_(sn), v); }
|
||||
inline uint8_t getSn_MR2(uint8_t sn) { return WIZCHIP_READ(_Sn_MR2_(sn)); }
|
||||
inline void setSn_RTR(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_RTR_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_RTR_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_RTR(uint8_t sn) { return (((uint16_t)WIZCHIP_READ(_Sn_RTR_(sn))) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_RTR_(sn), 1)); }
|
||||
inline void setSn_RCR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_RCR_(sn), v); }
|
||||
inline uint8_t getSn_RCR(uint8_t sn) { return WIZCHIP_READ(_Sn_RCR_(sn)); }
|
||||
inline void setSn_KPALVTR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_KPALVTR_(sn), v); }
|
||||
inline uint8_t getSn_KPALVTR(uint8_t sn) { return WIZCHIP_READ(_Sn_KPALVTR_(sn)); }
|
||||
inline void setSn_TX_BSR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_TX_BSR_(sn), v); }
|
||||
inline void setSn_TXBUF_SIZE(uint8_t sn, uint8_t v) { setSn_TX_BSR(sn, v); }
|
||||
inline uint8_t getSn_TX_BSR(uint8_t sn) { return WIZCHIP_READ(_Sn_TX_BSR_(sn)); }
|
||||
inline uint8_t getSn_TXBUF_SIZE(uint8_t sn) { return getSn_TX_BSR(sn); }
|
||||
inline uint16_t getSn_TxMAX(uint8_t sn) { return getSn_TX_BSR(sn) << 10; }
|
||||
|
||||
inline uint16_t getSn_TX_RD(uint8_t sn) { return (((uint16_t)WIZCHIP_READ(_Sn_TX_RD_(sn))) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_TX_RD_(sn), 1)); }
|
||||
inline void setSn_TX_WR(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_TX_WR_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_TX_WR_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_TX_WR(uint8_t sn) { return ((uint16_t)WIZCHIP_READ(_Sn_TX_WR_(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_TX_WR_(sn), 1)); }
|
||||
inline void setSn_RX_BSR(uint8_t sn, uint8_t v) { WIZCHIP_WRITE(_Sn_RX_BSR_(sn), v); }
|
||||
inline void setSn_RXBUF_SIZE(uint8_t sn, uint8_t v) { setSn_RX_BSR(sn, v); }
|
||||
inline uint8_t getSn_RX_BSR(uint8_t sn) { return WIZCHIP_READ(_Sn_RX_BSR_(sn)); }
|
||||
inline uint8_t getSn_RXBUF_SIZE(uint8_t sn) { return getSn_RX_BSR(sn); }
|
||||
inline uint16_t getSn_RxMAX(uint8_t sn) { return getSn_RX_BSR(sn) << 10; }
|
||||
|
||||
inline void setSn_RX_RD(uint8_t sn, uint16_t v) {
|
||||
WIZCHIP_WRITE(_Sn_RX_RD_(sn), (uint8_t)(v >> 8));
|
||||
WIZCHIP_WRITE(WIZCHIP_OFFSET_INC(_Sn_RX_RD_(sn), 1), (uint8_t)v);
|
||||
}
|
||||
inline uint16_t getSn_RX_RD(uint8_t sn) { return ((uint16_t)WIZCHIP_READ(_Sn_RX_RD_(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_RX_RD_(sn), 1)); }
|
||||
inline uint16_t getSn_RX_WR(uint8_t sn) { return ((uint16_t)WIZCHIP_READ(_Sn_RX_WR_(sn)) << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(_Sn_RX_WR_(sn), 1)); }
|
||||
static critical_section_t g_cris_sec;
|
||||
|
||||
void wizchip_cris_enter() {
|
||||
@@ -15,39 +581,6 @@ void wizchip_cris_exit() {
|
||||
critical_section_exit(&g_cris_sec);
|
||||
}
|
||||
|
||||
void wizchip_reset() {
|
||||
gpio_init(PIN_RST);
|
||||
gpio_set_dir(PIN_RST, GPIO_OUT);
|
||||
gpio_put(PIN_RST, 0);
|
||||
sleep_ms(100);
|
||||
gpio_put(PIN_RST, 1);
|
||||
sleep_ms(100);
|
||||
}
|
||||
|
||||
void wizchip_spi_initialize() {
|
||||
wizchip_pio_init();
|
||||
}
|
||||
|
||||
void wizchip_cris_initialize() {
|
||||
critical_section_init(&g_cris_sec);
|
||||
}
|
||||
|
||||
void wizchip_initialize() {
|
||||
wizchip_pio_frame_end();
|
||||
uint8_t memsize[2][8] = {{4, 4, 4, 4, 4, 4, 4, 4}, {4, 4, 4, 4, 4, 4, 4, 4}};
|
||||
ctlwizchip(CW_INIT_WIZCHIP, (void *)memsize);
|
||||
}
|
||||
|
||||
bool wizchip_check() {
|
||||
return getCIDR() == 0x6300;
|
||||
}
|
||||
|
||||
void network_initialize(wiz_NetInfo net_info) {
|
||||
uint8_t syslock = SYS_NET_LOCK;
|
||||
ctlwizchip(CW_SYS_UNLOCK, &syslock);
|
||||
ctlnetwork(CN_SET_NETINFO, (void *)&net_info);
|
||||
}
|
||||
|
||||
static uint8_t make_opcode(uint32_t addr, uint8_t rw) {
|
||||
return static_cast<uint8_t>((addr & 0xFF) | rw | _WIZCHIP_QSPI_MODE_);
|
||||
}
|
||||
@@ -152,6 +685,8 @@ uint16_t wiz_mdio_read(uint8_t phyregaddr) {
|
||||
return getPHYDOR();
|
||||
}
|
||||
|
||||
} // namespace
|
||||
|
||||
static uint8_t dns_[4];
|
||||
static uint8_t dns6_[16];
|
||||
static ipconf_mode ipmode_;
|
||||
@@ -1063,3 +1598,36 @@ int16_t peeksockmsg(uint8_t sn, uint8_t* submsg, uint16_t subsize) {
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
void wizchip_reset() {
|
||||
gpio_init(PIN_RST);
|
||||
gpio_set_dir(PIN_RST, GPIO_OUT);
|
||||
gpio_put(PIN_RST, 0);
|
||||
sleep_ms(100);
|
||||
gpio_put(PIN_RST, 1);
|
||||
sleep_ms(100);
|
||||
}
|
||||
|
||||
void wizchip_spi_initialize() {
|
||||
wizchip_pio_init();
|
||||
}
|
||||
|
||||
void wizchip_cris_initialize() {
|
||||
critical_section_init(&g_cris_sec);
|
||||
}
|
||||
|
||||
void wizchip_initialize() {
|
||||
wizchip_pio_frame_end();
|
||||
uint8_t memsize[2][8] = {{4, 4, 4, 4, 4, 4, 4, 4}, {4, 4, 4, 4, 4, 4, 4, 4}};
|
||||
ctlwizchip(CW_INIT_WIZCHIP, (void *)memsize);
|
||||
}
|
||||
|
||||
bool wizchip_check() {
|
||||
return getCIDR() == 0x6300;
|
||||
}
|
||||
|
||||
void network_initialize(wiz_NetInfo net_info) {
|
||||
uint8_t syslock = SYS_NET_LOCK;
|
||||
ctlwizchip(CW_SYS_UNLOCK, &syslock);
|
||||
ctlnetwork(CN_SET_NETINFO, (void *)&net_info);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user