cabletest/docs/nics/e810/README.md

Intel E810 (ice)

The NIC the committed measurement path was built against: its datapath delivers per-packet MAC RX timestamps (rx_filter=ALL), which bucketing and probe.go require. A patched ice + sff_i2c exists for read-side diagnostics work.

Module I2C: multi-byte framing works, writes are policy-blocked

• topo-I2C (0x06E2/E3) has offset-size control: params bit[7] repeated-start, [6:5] address length, [3:0] data size. Reads work perfectly.
• Every write returns aq 1 (EPERM) — tested identically against EEPROM 0x50 and BCM 0x56, so the block is write-vs-read, not address-scoped. Intel policy, survives NVM update; NVM 5.01 hardened the 3.10 silent-drop into an explicit EPERM.
• Dead for anything needing writes: RollBall unlock needs a write; BCM SMI reads start with a write.